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74AUP2G00DC-Q100 PDF预览

74AUP2G00DC-Q100

更新时间: 2024-01-11 18:55:27
品牌 Logo 应用领域
安世 - NEXPERIA /
页数 文件大小 规格书
13页 219K
描述
Low-power dual 2-input NAND gateProduction

74AUP2G00DC-Q100 技术参数

生命周期:Active零件包装代码:SSOP
包装说明:,针数:8
Reach Compliance Code:compliant风险等级:5.77
逻辑集成电路类型:NAND GATEBase Number Matches:1

74AUP2G00DC-Q100 数据手册

 浏览型号74AUP2G00DC-Q100的Datasheet PDF文件第3页浏览型号74AUP2G00DC-Q100的Datasheet PDF文件第4页浏览型号74AUP2G00DC-Q100的Datasheet PDF文件第5页浏览型号74AUP2G00DC-Q100的Datasheet PDF文件第7页浏览型号74AUP2G00DC-Q100的Datasheet PDF文件第8页浏览型号74AUP2G00DC-Q100的Datasheet PDF文件第9页 
Nexperia  
74AUP2G00-Q100  
Low-power dual 2-input NAND gate  
Symbol Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Tamb = -40 °C to +125 °C  
VIH  
HIGH-level input voltage  
VCC = 0.8 V  
0.75 × VCC  
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
VCC = 0.9 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
VCC = 0.8 V  
0.70 × VCC  
-
1.6  
-
2.0  
-
VIL  
LOW-level input voltage  
-
-
-
-
0.25 × VCC  
0.30 × VCC  
0.7  
VCC = 0.9 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
0.9  
VOH  
HIGH-level output voltage VI = VIH or VIL  
IO = -20 μA; VCC = 0.8 V to 3.6 V  
VCC - 0.11  
0.6 × VCC  
0.93  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
IO = -1.1 mA; VCC = 1.1 V  
IO = -1.7 mA; VCC = 1.4 V  
IO = -1.9 mA; VCC = 1.65 V  
IO = -2.3 mA; VCC = 2.3 V  
IO = -3.1 mA; VCC = 2.3 V  
IO = -2.7 mA; VCC = 3.0 V  
IO = -4.0 mA; VCC = 3.0 V  
1.17  
1.77  
1.67  
2.40  
2.30  
VOL  
LOW-level output voltage  
VI = VIH or VIL  
IO = 20 μA; VCC = 0.8 V to 3.6 V  
IO = 1.1 mA; VCC = 1.1 V  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.11  
0.33 × VCC  
0.41  
V
V
IO = 1.7 mA; VCC = 1.4 V  
V
IO = 1.9 mA; VCC = 1.65 V  
IO = 2.3 mA; VCC = 2.3 V  
0.39  
V
0.36  
V
IO = 3.1 mA; VCC = 2.3 V  
0.50  
V
IO = 2.7 mA; VCC = 3.0 V  
0.36  
V
IO = 4.0 mA; VCC = 3.0 V  
0.50  
V
II  
input leakage current  
VI = GND to 3.6 V; VCC = 0 V to 3.6 V  
VI or VO = 0 V to 3.6 V; VCC = 0 V  
±0.75  
±0.75  
±0.75  
μA  
μA  
μA  
IOFF  
ΔIOFF  
power-off leakage current  
additional power-off  
leakage current  
VI or VO = 0 V to 3.6 V;  
VCC = 0 V to 0.2 V  
ICC  
supply current  
VI = GND or VCC; IO = 0 A;  
VCC = 0.8 V to 3.6 V  
-
-
-
-
1.4  
75  
μA  
μA  
ΔICC  
additional supply current  
VI = VCC - 0.6 V; IO = 0 A;  
VCC = 3.3 V; per pin  
[1]  
[1] One input at VCC - 0.6 V, other input at VCC or GND.  
©
74AUP2G00_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 3 — 14 July 2023  
6 / 13  
 

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