5秒后页面跳转
74AUP2G00DC PDF预览

74AUP2G00DC

更新时间: 2024-01-31 17:53:38
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
16页 84K
描述
Low-power dual 2-input NAND gate

74AUP2G00DC 数据手册

 浏览型号74AUP2G00DC的Datasheet PDF文件第10页浏览型号74AUP2G00DC的Datasheet PDF文件第11页浏览型号74AUP2G00DC的Datasheet PDF文件第12页浏览型号74AUP2G00DC的Datasheet PDF文件第13页浏览型号74AUP2G00DC的Datasheet PDF文件第14页浏览型号74AUP2G00DC的Datasheet PDF文件第15页 
74AUP2G00  
Philips Semiconductors  
Low-power dual 2-input NAND gate  
18. Contents  
1
2
3
4
5
General description . . . . . . . . . . . . . . . . . . . . . . 1  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Ordering information. . . . . . . . . . . . . . . . . . . . . 2  
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2  
6
6.1  
6.2  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2  
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3  
7
Functional description . . . . . . . . . . . . . . . . . . . 3  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Recommended operating conditions. . . . . . . . 4  
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5  
Dynamic characteristics . . . . . . . . . . . . . . . . . . 8  
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11  
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 14  
8
9
10  
11  
12  
13  
14  
15  
16  
Legal information. . . . . . . . . . . . . . . . . . . . . . . 15  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
16.1  
16.2  
16.3  
16.4  
17  
18  
Contact information. . . . . . . . . . . . . . . . . . . . . 15  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© Koninklijke Philips Electronics N.V. 2006.  
All rights reserved.  
For more information, please visit: http://www.semiconductors.philips.com.  
For sales office addresses, email to: sales.addresses@www.semiconductors.philips.com.  
Date of release: 25 August 2006  
Document identifier: 74AUP2G00_1  

与74AUP2G00DC相关器件

型号 品牌 描述 获取价格 数据表
74AUP2G00DC-G NXP Low-power dual 2-input NAND gate

获取价格

74AUP2G00DC-Q100 NEXPERIA Low-power dual 2-input NAND gateProduction

获取价格

74AUP2G00GD NXP Low-power dual 2-input NAND gate

获取价格

74AUP2G00GD,125 NXP 74AUP2G00 - Low-power dual 2-input NAND gate SON 8-Pin

获取价格

74AUP2G00GM NXP Low-power dual 2-input NAND gate

获取价格

74AUP2G00GM,125 NXP 74AUP2G00 - Low-power dual 2-input NAND gate QFN 8-Pin

获取价格