74AUP2G00DC

更新时间： 2024-02-02 20:28:04

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
16页	84K
描述
Low-power dual 2-input NAND gate

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74AUP2G00DC 数据手册

74AUP2G00

Philips Semiconductors

Low-power dual 2-input NAND gate

14. Abbreviations

Table 11. Abbreviations

Acronym

CDM

CMOS

DUT

Description

Charged Device Model

Complementary Metal Oxide Semiconductor

Device Under Test

ESD

ElectroStatic Discharge

Human Body Model

HBM

Machine Model

TTL

Transistor-Transistor Logic

15. Revision history

Table 12. Revision history

Document ID

Release date

Data sheet status

Change notice

Supersedes

74AUP2G00_1

20060825

Product data sheet

74AUP2G00_1

Product data sheet

Rev. 01 — 25 August 2006

14 of 16

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型号	品牌	获取价格	描述	数据表
74AUP2G00DC-G	NXP	获取价格	Low-power dual 2-input NAND gate
74AUP2G00DC-Q100	NEXPERIA	获取价格	Low-power dual 2-input NAND gateProduction
74AUP2G00GD	NXP	获取价格	Low-power dual 2-input NAND gate
74AUP2G00GD,125	NXP	获取价格	74AUP2G00 - Low-power dual 2-input NAND gate SON 8-Pin
74AUP2G00GM	NXP	获取价格	Low-power dual 2-input NAND gate
74AUP2G00GM,125	NXP	获取价格	74AUP2G00 - Low-power dual 2-input NAND gate QFN 8-Pin
74AUP2G00GN	NEXPERIA	获取价格	Low-power dual 2-input NAND gateProduction
74AUP2G00GS	NEXPERIA	获取价格	Low-power dual 2-input NAND gateProduction
74AUP2G00GT	NXP	获取价格	Low-power dual 2-input NAND gate
74AUP2G00GT	NEXPERIA	获取价格	Low-power dual 2-input NAND gateProduction