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74AHC595BQ PDF预览

74AHC595BQ

更新时间： 2024-09-17 11:12:11
品牌 Logo 应用领域
安世 - NEXPERIA 逻辑集成电路触发器
页数 文件大小 规格书
19页 289K
描述
8-bit serial-in/serial-out or parallel-out shift register with output latchesProduction

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中文翻译

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74AHC595BQ 技术参数

是否Rohs认证： 符合生命周期：Active
包装说明：2.50 X 3.50 MM, 0.85 MM HEIGHT, PLASTIC, MO-241, SOT763-1, DHVQFN-16Reach Compliance Code：compliant
HTS代码：8542.39.00.01风险等级：5.26
Is Samacsys：N计数方向：RIGHT
系列：AHC/VHC/H/U/VJESD-30 代码：R-PQCC-N16
JESD-609代码：e4长度：3.5 mm
逻辑集成电路类型：SERIAL IN PARALLEL OUT湿度敏感等级：1
位数：8功能数量：1
端子数量：16最高工作温度：125 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：HVQCCN封装形状：RECTANGULAR
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度（摄氏度）：260
传播延迟（tpd）：20.1 ns认证状态：Not Qualified
座面最大高度：1 mm最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：2 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：AUTOMOTIVE端子面层：Nickel/Palladium/Gold/Silver (Ni/Pd/Au/Ag)
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：30
触发器类型：POSITIVE EDGE宽度：2.5 mm
最小 fmax：90 MHzBase Number Matches：1

74AHC595BQ 数据手册

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74AHC595; 74AHCT595  
8-bit serial-in/serial-out or parallel-out shift register with  
output latches  
Rev. 6 — 26 May 2020  
Product data sheet  
1. General description  
The 74AHC595; 74AHCT595 is an 8-bit serial-in/serial or parallel-out shift register with a storage  
register and 3-state outputs. Both the shift and storage register have separate clocks. The device  
features a serial input (DS) and a serial output (Q7S) to enable cascading and an asynchronous  
reset MR input. A LOW on MR will reset the shift register. Data is shifted on the LOW-to-HIGH  
transitions of the SHCP input. The data in the shift register is transferred to the storage register  
on a LOW-to-HIGH transition of the STCP input. If both clocks are connected together, the shift  
register will always be one clock pulse ahead of the storage register. Data in the storage register  
appears at the output whenever the output enable input (OE) is LOW. A HIGH on OE causes  
the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect  
the state of the registers. The 74AHCT595 features TTL compatible inputs. Both 74AHC595  
and 74AHCT595 inputs are overvoltage tolerant. This feature allows the use of these devices as  
translators in mixed voltage environments.  
2. Features and benefits  
•
Wide supply voltage range from 2.0 V to 5.5 V  
•
•
•
•
•
•
Balanced propagation delays  
All inputs have Schmitt-trigger action  
Overvoltage tolerant inputs to 5.5 V  
High noise immunity  
CMOS low power dissipation  
Input levels:  
•
•
The 74AHC595 operates with CMOS input levels  
The 74AHCT595 operates with TTL input levels  
•
ESD protection:  
•
•
•
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
CDM JESD22-C101E exceeds 1000 V  
•
•
•
Latch-up performance exceeds 100 mA per JESD 78 Class II Level A  
Multiple package options  
Specified from -40 °C to +85 °C and from -40 °C to +125 °C  
3. Applications  
•
•
Serial-to-parallel data conversion  
Remote control holding register  
 
 
 
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