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74AHC595PW-Q100 PDF预览

74AHC595PW-Q100

更新时间: 2024-12-02 01:02:15
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安世 - NEXPERIA /
页数 文件大小 规格书
22页 794K
描述
8-bit serial-in/serial-out or parallel-out shift register with output latches

74AHC595PW-Q100 数据手册

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74AHC595-Q100;  
74AHCT595-Q100  
8-bit serial-in/serial-out or parallel-out shift register with  
output latches  
Rev. 1 — 12 July 2012  
Product data sheet  
1. General description  
The 74AHC595-Q100; 74AHCT595-Q100 are high-speed Si-gate CMOS devices and are  
pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance  
with JEDEC standard No. 7A.  
The 74AHC595-Q100; 74AHCT595-Q100 are 8-stage serial shift registers with a storage  
register and 3-state outputs. The registers have separate clocks.  
Data is shifted on the positive-going transitions of the shift register clock input (SHCP).  
The data in each register is transferred to the storage register on a positive-going  
transition of the storage register clock input (STCP). If both clocks are connected together,  
the shift register is always one clock pulse ahead of the storage register.  
The shift register has a serial input (DS) and a serial standard output (Q7S) for cascading.  
It is also provided with asynchronous reset (active LOW) for all 8 shift register stages. The  
storage register has 8 parallel 3-state bus driver outputs. Data in the storage register  
appears at the output whenever the output enable input (OE) is LOW.  
This product has been qualified to the Automotive Electronics Council (AEC) standard  
Q100 (Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from 40 C to +85 C and from 40 C to +125 C  
Balanced propagation delays  
All inputs have Schmitt trigger action  
Inputs accept voltages higher than VCC  
Input levels:  
The 74AHC595-Q100 operates with CMOS input levels  
The 74AHCT595-Q100 operates with TTL input levels  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 )  
Multiple package options  

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