Datasheet > WCMA2008U1B-FF70

WCMA2008U1B-FF70

更新时间： 2022-11-25 19:04:43

品牌	Logo	应用领域
其他 - ETC		/
页数	文件大小	规格书
11页	144K
描述
256K x 8 Static RAM

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数据手册

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WCMA2008U1B-FF70 数据手册

U 1 B

WCMA2008U1B

256K x 8 Static RAM

reduces power consumption by 80% when addresses are not

toggling. The device can be put into standby mode reducing

power consumption by more than 99% when deselected (CE₁

HIGH or CE₂LOW).

Features

• High Speed

—70ns availability

• Voltage range

Writing to the device is accomplished by taking Chip Enable

(CE₁) and Write Enable (WE) inputs LOW and Chip Enable 2

(CE₂) HIGH. Data on the eight I/O pins (I/O₀through I/O₇) is

then written into the location specified on the address pins (A₀

through A₁₇).

—2.7V–3.3V

• Ultra low active power

—Typical active current: 1 mA @ f = 1MHz

—Typical active current: 7 mA @ f = f_max(70ns speed)

Reading from the device is accomplished by taking Chip En-

able (CE₁) and Output Enable (OE) LOW while forcing Write

Enable (WE) and Chip Enable 2 (CE₂) HIGH. Under these

conditions, the contents of the memory location specified by

the address pins will appear on the I/O pins.

• Low standby power

• Easy memory expansion withCE₁,CE₂,and OEfeatures

• Automatic power-down when deselected

• CMOS for optimum speed/power

The eight input/output pins (I/O₀through I/O₇) are placed in a

high-impedance state when the device is deselected (CE₁

HIGH or CE₂LOW), the outputs are disabled (OE HIGH), or

during a write operation (CE₁LOW and CE₂HIGH and WE

LOW).

Functional Description

The WCMA2008U1B is a high-performance CMOS static

RAM organized as 256K words by 8 bits. This device features

advanced circuit design to provide ultra-low active current.

This is device is ideal for portable applications. The device

also has an automatic power-down feature that significantly

The WCMA2008U1B is available in a 36-ball FBGA package.

Logic Block Diagram

I/O

Data in Drivers

I/O

128K x 8

ARRAY

I/O

POWER

DOWN

COLUMN

DECODER

CE₁

CE₂

12 3 4 5 6 7...11

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