A2008U1X
WCMA2008U1X
256K x 8 Static RAM
es power consumption by 80% when addresses are not tog-
gling. The device can be put into standby mode reducing pow-
er consumption by more than 99% when deselected (CE1
HIGH or CE2 LOW).
Features
• High Speed
— 70ns availability
• Voltage range
Writing to the device is accomplished by taking Chip Enable
(CE1) and Write Enable (WE) inputs LOW and Chip Enable 2
(CE2) HIGH. Data on the eight I/O pins (I/O0 through I/O7) is
then written into the location specified on the address pins (A0
through A17).
— 2.7V–3.6V
• Ultra low active power
— Typical active current: 1 mA @ f = 1MHz
— Typical active current: 7 mA @ f = fmax (70ns speed)
• Low standby power
• Easy memory expansion with CE1,CE2,and OE features
• Automatic power-down when deselected
• CMOS for optimum speed/power
Reading from the device is accomplished by taking Chip En-
able (CE1) and Output Enable (OE) LOW while forcing Write
Enable (WE) and Chip Enable 2 (CE2) HIGH. Under these
conditions, the contents of the memory location specified by
the address pins will appear on the I/O pins.
The eight input/output pins (I/O0 through I/O7) are placed in a
high-impedance state when the device is deselected (CE1
HIGH or CE2 LOW), the outputs are disabled (OE HIGH), or
during a write operation (CE1 LOW and CE2 HIGH and WE
LOW).
Functional Description
The WCMA2008U1X is a high-performance CMOS static
RAM organized as 256K words by 8 bits. This device features
advanced circuit design to provide ultra-low active current.
This is device is ideal for portable applications. The device also
has an automatic power-down feature that significantly reduc-
The WCMA2008U1X is available in a 36-ball FBGA package.
Logic Block Diagram
I/O
I/O
I/O
I/O
I/O
I/O
I/O
0
1
2
3
4
5
Data in Drivers
A
0
A
1
A
2
3
4
A
A
A
5
A
128K x 8
ARRAY
6
A
7
A
8
A
9
10
A
A
11
6
7
POWER
DOWN
COLUMN
DECODER
CE
1
CE
2
I/O
WE
OE