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W29EE011T15B PDF预览

W29EE011T15B

更新时间: 2024-11-09 22:25:55
品牌 Logo 应用领域
华邦 - WINBOND /
页数 文件大小 规格书
20页 183K
描述
128K X 8 CMOS FLASH MEMORY

W29EE011T15B 技术参数

生命周期:Obsolete零件包装代码:TSOP
包装说明:TSOP1, TSSOP32,.8,20针数:32
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.51风险等级:5.82
最长访问时间:150 ns其他特性:HARDWARE AND SOFTWARE DATA PROTECTION; 10-YEARS DATA RETENTION; 10K PROGRAM/ERASE CYCLE
命令用户界面:NO数据轮询:YES
数据保留时间-最小值:10耐久性:10000 Write/Erase Cycles
JESD-30 代码:R-PDSO-G32长度:18.4 mm
内存密度:1048576 bit内存集成电路类型:FLASH
内存宽度:8功能数量:1
部门数/规模:1K端子数量:32
字数:131072 words字数代码:128000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:128KX8
封装主体材料:PLASTIC/EPOXY封装代码:TSOP1
封装等效代码:TSSOP32,.8,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE并行/串行:PARALLEL
电源:5 V编程电压:5 V
认证状态:Not Qualified座面最大高度:1.2 mm
部门规模:128最大待机电流:0.0001 A
子类别:Flash Memories最大压摆率:0.05 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL切换位:YES
类型:NOR TYPE宽度:8 mm
最长写入周期时间 (tWC):10 msBase Number Matches:1

W29EE011T15B 数据手册

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W29EE011  
128K ´ 8 CMOS FLASH MEMORY  
GENERAL DESCRIPTION  
´
The W29EE011 is a 1-megabit, 5-volt only CMOS flash memory organized as 128K 8 bits. The  
PP  
device can be programmed and erased in-system with a standard 5V power supply. A 12-volt V is  
not required. The unique cell architecture of the W29EE011 results in fast program/erase operations  
with extremely low current consumption (compared to other comparable 5-volt flash memory  
products). The device can also be programmed and erased using standard EPROM programmers.  
FEATURES  
·
·
·
Single 5-volt program and erase operations  
Fast page-write operations  
Low power consumption  
-
-
Active current: 25 mA (typ.)  
- 128 bytes per page  
m
Standby current: 20 A (typ.)  
PP  
·
·
-
-
-
Page program cycle: 10 mS (max.)  
Automatic program timing with internal V  
generation  
m
Effective byte-program cycle time: 39 S  
Optional software-protected data write  
End of program detection  
-
-
Toggle bit  
·
·
·
·
·
Fast chip-erase operation: 50 mS  
Read access time: 90/150 nS  
Page program/erase cycles: 1K/10K  
Ten-year data retention  
Data polling  
·
·
·
·
Latched address and data  
TTL compatible I/O  
JEDEC standard byte-wide pinouts  
Software and hardware data protection  
Available packages: 32-pin 600 mil DIP,  
TSOP, and PLCC  
Publication Release Date: July 1999  
Revision A12  
- 1 -  

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