Datasheet > UPF01012

UPF01012

更新时间： 2024-11-18 12:16:59

品牌	Logo	应用领域
英飞凌 - INFINEON		/
页数	文件大小	规格书
2页	162K
描述
10 Gigabit/s Transceiver with XAUI Interface

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UPF01012 数据手册

P R O D U C T B R I E F

10 Gigabit/s Transceiver with

XAUI Interface

The TenGiPHY-L is a single chip transceiver IC

for 10 Gbit/s Ethernet and Fibre Channel connec-

tivity. It offers a serial, full duplex 10 Gbit/s, XFI

compliant interface to optical components or to a

serial fiber-optic module (XFP). The integrated

CDR and CMU operate at a data rate of 10.3125 or

10.51875 Gbit/s. The TenGiPHY-L provides the

XGXS, PCS and PMA sublayers of the 10 Gbit/s

Ethernet and Fibre Channel standards.

At the system side, a quad serial XAUI interface

connects the TenGiPHY-L to the upper layers.

The networking system can control the chip via a

narrow-width MDIO interface by writing and read-

ing its control and status registers.

Applications

■ Clock & data recovery and clock

multiplying unit without external

■ Provides access to E²PROM via

I²C interface according to XEN-

UPF 01012

■ Fiber optic modules according to

loop filter components

PAK requirements; automatic

the XENPAK multi-source

E²PROM download on power-up

■ Supports various clocking

agreement

modes based on external refer-

ence clocks, loop- and external

timing

■ Power-efficient design:

■ 10 Gbit/s Ethernet line cards

<1.3W @ 1.3V

■ 10 Gbit/s Fibre Channel line and

NIC cards

■ Integrated bit error rate tester

(BERT) usable for multiple at-

speed diagnostic scenarios

Interfaces

■ Terabit Routers

■ Full duplex, XFI compliant serial

CML line interface for data rates

between 10.3 and 10.5 Gbit/s

■ Quad serial Gbit/s XAUI interface

with data rates between 3.1 and

3.2 Gbit/s

Features

■ Includes the XGXS, PCS, and

PMA sublayers of the OSI proto-

col stack

■ Complete 10 Gbit/s Ethernet and

Fibre Channel PHY device sup-

porting LAN applications

■ Synchronization and de-skewing

■ Complies with IEEE 802.3ae

■ Complies with ANSI 1413-D

of XAUI lanes

■ MDIO interface

■ I²C interface

■ Performs 8B/10B (de-)coding

required for the XGXS sublayer

■ Compliant to XENPAK multi-

■ XENPAK diagnostic interface

providing eight 12-bit ADCs and

four 10-bit DACs

source agreement

■ Various loop back modes for

system debugging

■ Embedded µController allows for

control and tuning of the PMDs

via analog interfaces

■ IEEE 1149.1 JTAG boundary

scan interface

U P F 0 1 0 1 2

TenGiPHY-L

N e v e r s t o p t h i n k i n g .

中文翻译

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