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TNETE100APCM PDF预览

TNETE100APCM

更新时间: 2024-11-23 12:16:11
品牌 Logo 应用领域
德州仪器 - TI 微控制器和处理器串行IO控制器通信控制器外围集成电路数据传输PC局域网局域网(LAN)标准时钟
页数 文件大小 规格书
26页 363K
描述
SINGLE-CHIP 10 BASE-T WITH MII FOR 100 BASE-T/100VG-AnyLAN

TNETE100APCM 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:ObsoleteReach Compliance Code:not_compliant
HTS代码:8542.31.00.01Factory Lead Time:1 week
风险等级:5.85Is Samacsys:N
地址总线宽度:32边界扫描:YES
总线兼容性:PCI最大时钟频率:33 MHz
数据编码/解码方法:NRZ最大数据传输速率:12.5 MBps
外部数据总线宽度:32JESD-30 代码:S-PQFP-G144
长度:28 mm低功率模式:NO
DMA 通道数量:1I/O 线路数量:
串行 I/O 数:3端子数量:144
片上数据RAM宽度:最高工作温度:95 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:QFP封装等效代码:QFP144,1.2SQ
封装形状:SQUARE封装形式:FLATPACK
峰值回流温度(摄氏度):NOT SPECIFIED电源:3/5,5 V
认证状态:Not QualifiedRAM(字数):0
座面最大高度:4.1 mm子类别:Serial IO/Communication Controllers
最大压摆率:285 mA最大供电电压:5.25 V
最小供电电压:3 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:OTHER端子形式:GULL WING
端子节距:0.65 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:28 mm
uPs/uCs/外围集成电路类型:SERIAL IO/COMMUNICATION CONTROLLER, LANBase Number Matches:1

TNETE100APCM 数据手册

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ThunderLAN TNETE100A  
PCI ETHERNET CONTROLLER  
SINGLE-CHIP 10 BASE-T WITH MII FOR 100 BASE-T/100VG-AnyLAN  
SPWS021B – OCTOBER 1995 – REVISED NOVEMBER 1996  
Single-Chip Ethernet Controller for the  
Integrated 10 Base-T, and 10 Base-5  
Arithmetic Unit Interface (AUI)  
Physical-Layer Interface  
– Single-Chip IEEE 802.3 and Blue Book  
Ethernet-Compliant Solution  
– DSP-Based Digital Phase-Locked Loop  
– Smart Squelch Allows for Transparent  
Link Testing  
Peripheral Component Interconnect (PCI)  
Local Bus  
– 32-Bit PCI Glueless Host Interface  
– Compliant With PCI Local-Bus  
Specification (Revision 2.0)  
– 0-MHz to 33-MHz Operation  
– 3-V or 5-V I/O Operation  
– Adaptive Performance Optimization  
(APO) by Texas Instruments (TI ) for  
Highest Available PCI Bandwidth  
– High-Performance Bus Master  
Architecture With Byte-Aligning Direct  
Memory Access (DMA) Controller for  
Low Host CPU and Bus Utilization  
– Plug-and-Play Compatible  
– Transmission Waveshaping  
– Autopolarity (Reverse Polarity  
Correction)  
– External/Internal Loopback Including  
Twisted Pair and AUI  
– 10 Base-2 Supported Through AUI  
Interface  
Media-Independent Interface (MII) for  
Connecting 100-Mbps External  
Transceivers  
– Compliant MII for IEEE 802.3u  
Transceivers  
Supports 32-Bit Data Streaming on PCI Bus  
– Time-Division Multiplexed Static  
Random-Access Memory (SRAM)  
– 2-Gbps Internal Bandwidth  
– Supports 100 Base-TX, 100 Base-T4, and  
100 Base-FX  
– Super Set Supports IEEE 802.12  
Transceivers  
– Supports Ethernet and Token-Ring  
Framing Formats for 100VG-AnyLAN  
– Link-Pulse Detection for Determining  
Wire Rate  
Driver Compatible With All Previous  
ThunderLAN Components  
Switched Ethernet Compatible  
Full-Duplex Compatible  
– Independent Transmit and Receive  
Channels  
– Two Transmit Channels for Demand  
Priority  
Low-Power CMOS Technology  
– Green PC Compatible  
– Microsoft Advanced Power  
Management  
Supports Multiple Protocols With a Single  
Driver SuiteOptimized Shared Interrupts  
No On-Board Memory Required  
Auto-Negotiation (N-Way) Compatible  
Multimedia-Ready Architecture  
EEPROM Interface Supports Jumperless  
Design and Autoconfiguration  
Hardware Statistics Registers for  
Management-Information Base (MIB)  
Supports the Card-Bus Card Information  
Structure (CIS) Pointer Register  
DMTF (Desktop Management Task Force)  
Compatible  
IEEE Standard 1149.1 Test-Access Port  
(JTAG)  
144-Pin Quad Flat Packages (PCM Suffix)  
and Thin Quad Flat Packages (PGE Suffix)  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
The PCI Local-Bus Specification, Revision 2.0 should be used as a reference with this document.  
IEEE Standard 1149.1–1990, IEEE Standard Test-Access Port and Boundary-Scan Architecture  
ThunderLAN, Adaptive Performance Optimization, and TI are trademarks of Texas Instruments Incorporated.  
Ethernet is a registered trademark of Xerox Corporation.  
Microsoft is a registered trademark of Microsoft Corp.  
Copyright 1996, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443  

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