5秒后页面跳转
捷配首页

Datasheet > TNETE110APGE
TNETE110APGE PDF预览

TNETE110APGE

更新时间： 2024-11-23 21:21:27
品牌 Logo 应用领域
德州仪器 - TI 时钟局域网数据传输PC外围集成电路
页数 文件大小 规格书
24页 351K
描述
PCI Ethernet Controller and Physical Layer Device 144-LQFP 0 to 0

阅读下载

中文翻译

获取价格

TNETE110APGE 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：QFP
包装说明：LFQFP, QFP144,.87SQ,20针数：144
Reach Compliance Code：not_compliantHTS代码：8542.31.00.01
Factory Lead Time：1 week风险等级：5.88
地址总线宽度：32边界扫描：YES
总线兼容性：PCI最大时钟频率：20 MHz
数据编码/解码方法：BIPH-LEVEL(MANCHESTER)最大数据传输速率：1.25 MBps
外部数据总线宽度：32JESD-30 代码：S-PQFP-G144
长度：20 mm低功率模式：NO
DMA 通道数量：1I/O 线路数量：
串行 I/O 数：2端子数量：144
片上数据RAM宽度：最高工作温度：95 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：LFQFP封装等效代码：QFP144,.87SQ,20
封装形状：SQUARE封装形式：FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED电源：3/5,5 V
认证状态：Not QualifiedRAM（字数）：0
座面最大高度：1.6 mm子类别：Serial IO/Communication Controllers
最大供电电压：5.25 V最小供电电压：4.75 V
标称供电电压：5 V表面贴装：YES
技术：CMOS温度等级：OTHER
端子形式：GULL WING端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：20 mmuPs/uCs/外围集成电路类型：SERIAL IO/COMMUNICATION CONTROLLER, LAN
Base Number Matches：1

TNETE110APGE 数据手册

 浏览型号TNETE110APGE的Datasheet PDF文件第2页浏览型号TNETE110APGE的Datasheet PDF文件第3页浏览型号TNETE110APGE的Datasheet PDF文件第4页浏览型号TNETE110APGE的Datasheet PDF文件第5页浏览型号TNETE110APGE的Datasheet PDF文件第6页浏览型号TNETE110APGE的Datasheet PDF文件第7页 
ThunderLAN TNETE110A  
PCI ETHERNET CONTROLLER  
SINGLE-CHIP 10 BASE-T  
SPWS022A – APRIL 1996 – REVISED NOVEMBER 1996  
Single-Chip Ethernet Adapter for the  
Peripheral Component Interconnect (PCI)  
Local Bus  
Integrated 10 Base-T, and 10 Base-5  
Attachment Unit Interface (AUI) Physical  
Layer Interface  
– Single-Chip IEEE 802.3 and Blue Book  
Ethernet-Compliant Solution  
– DSP-Based Digital Phase-Locked Loop  
– Smart Squelch Allows for Transparent  
Link Testing  
†
– 32-Bit PCI Glueless Host Interface  
– Compliant With PCI Local-Bus  
Specification (Revision 2.0)  
– 33-MHz Operation  
– 3-V or 5-V I/O Operation  
– Adaptive Performance Optimization  
(APO) by Texas Instruments (TI ) for  
Highest Available PCI Bandwidth  
– High-Performance Bus Master  
Architecture With Byte-Aligning DMA  
Controller for Low Host CPU and Bus  
Utilization  
– Transmission Waveshaping  
– Autopolarity (Reverse Polarity  
Correction)  
– External/Internal Loopback Including  
Twisted Pair and AUI  
– 10 Base-2 Supported Via AUI Interface  
Low-Power CMOS Technology  
– Green PC Compatible  
– Microsoft Advanced Power  
Management  
– Plug-and-Play Compatible  
Supports 32-Bit Data Streaming on PCI Bus  
– Time Division Multiplexed SRAM  
– 2-Gbps Internal Bandwidth  
EEPROM Interface Supports Jumperless  
Design and Autoconfiguration  
Driver Compatible With All Previous  
ThunderLAN Components  
Hardware Statistics Registers for  
Switched-Ethernet Compatible  
Management Information Base (MIB)  
Full-Duplex Compatible With Independent  
Transmit and Receive Channels  
DMTF (Desktop Management Task Force)  
Compatible  
‡
No On-Board Memory Required  
IEEE Standard 1149.1 Test Access Port  
(JTAG)  
Auto-Negotiation (N-Way) Compatible  
144-Pin Quad Flat Packages (PCM Suffix)  
and Thin Quad Flat Packages (PGE Suffix)  
Supports the Card Bus CIS Pointer  
Register  
10 Base-T  
Ethernet  
10 Base-T  
Physical  
Layer  
FIFO  
Registers  
Ethernet  
LAN  
Controller  
10 Mbps  
PCI  
Bus Master  
Control  
Interface  
10 Base-5  
(AUI)  
PCI  
Bus  
Multiplexed  
SRAM  
FIFO  
Figure 1. ThunderLAN Architecture  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
†
‡
The PCI Local-Bus Specification, Revision 2.0 should be used as a reference with this document.  
IEEE Standard 1149.1–1990, IEEE Standard Test-Access Port and Boundary-Scan Architecture  
ThunderLAN, Adaptive Performance Optimization, and TI are trademarks of Texas Instruments Incorporated.  
Ethernet is a trademark of Xerox Corporation.  
Microsoft is a trademark of Microsoft Corporation.  
Copyright 1996, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443  
1234567...24

中文翻译

下载PDF

与TNETE110APGE相关器件

型号 品牌 获取价格 描述 数据表
TNETE110PCE TI

获取价格

 		暂无描述
TNETE110PM TI

获取价格

 		PCI ETHERNETE CONTROLLER SINGLE-CHIP 10 BASE-T
TNETE110PMPCM TI

获取价格

 		2 CHANNEL(S), 10Mbps, LOCAL AREA NETWORK CONTROLLER, PQFP144, PLASTIC, TQFP-144
TNETE110PMPGE TI

获取价格

 		2 CHANNEL(S), 10Mbps, LOCAL AREA NETWORK CONTROLLER, PQFP144, PLASTIC, QFP-144
TNETE2004 TI

获取价格

 		MDIO-MANAGED QuadPHY FOUR 10BASE-T PHYSICAL-LAYER INTERFACES
TNETE2004PAC TI

获取价格

 		MDIO-MANAGED QuadPHY FOUR 10BASE-T PHYSICAL-LAYER INTERFACES
TNETE2004PBE TI

获取价格

 		MDIO-MANAGED QuadPHY FOUR 10BASE-T PHYSICAL-LAYER INTERFACES
TNETE2008 TI

获取价格

 		OctalPHY EIGHT 10BASE-T PHYSICAL-LAYER INTERFACES
TNETE2008PBE TI

获取价格

 		暂无描述
TNETE2101 TI

获取价格

 		10BASE-T/100BASE-TX/100BASE-FX LOW-POWER PHYSICAL-LAYER INTERFACE

与TNETE110APGE相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证