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TNETE110PM

更新时间： 2024-11-06 12:22:31
品牌 Logo 应用领域
德州仪器 - TI 控制器PC局域网（LAN）标准以太网：16GBASE-T
页数 文件大小 规格书
26页 380K
描述
PCI ETHERNETE CONTROLLER SINGLE-CHIP 10 BASE-T

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TNETE110PM 数据手册

 浏览型号TNETE110PM的Datasheet PDF文件第2页浏览型号TNETE110PM的Datasheet PDF文件第3页浏览型号TNETE110PM的Datasheet PDF文件第4页浏览型号TNETE110PM的Datasheet PDF文件第5页浏览型号TNETE110PM的Datasheet PDF文件第6页浏览型号TNETE110PM的Datasheet PDF文件第7页 
ThunderLAN TNETE110PM  
PCI ETHERNET CONTROLLER  
SINGLE-CHIP 10 BASE-T  
SPWS029 – SEPTEMBER 1996  
Single-Chip Ethernet Adapter for the  
Peripheral Component Interconnect (PCI)  
Local Bus  
Integrated 10 Base-T, and 10 Base-5  
Attachment Unit Interface (AUI) Physical  
Layer Interface  
– Single-Chip IEEE 802.3 and Blue Book  
Ethernet-Compliant Solution  
– DSP-Based Digital Phase-Locked Loop  
– Smart Squelch Allows for Transparent  
Link Testing  
†
– 32-Bit PCI Glueless Host Interface  
– Compliant With PCI Local-Bus  
Specification (Revision 2.1)  
– 33-MHz Operation  
– 3-V or 5-V I/O Operation  
– Adaptive Performance Optimization  
(APO) for Highest Available PCI  
Bandwidth  
– Transmission Waveshaping  
– Autopolarity (Reverse Polarity  
Correction)  
– High-Performance Bus Master  
Architecture With Byte-Aligning Direct  
Memory Access (DMA) Controller for  
Low Host CPU and Bus Utilization  
– Plug-and-Play Compatible  
– External/Internal Loopback Including  
Twisted Pair and AUI  
– 10 Base-2 Supported Via AUI Interface  
Magic Packet Remote Wake-Up Scheme  
Microsoft Advanced Power Management  
– PCI Specification Compatible for Low  
Power/Sleep Mode  
– Advanced Configuration and Power  
Interface (ACPI)  
Supports 32-Bit Data Streaming on PCI Bus  
– Time Division Multiplexed SRAM  
– 2-Gbps Internal Bandwidth  
Driver Compatible With All Previous  
ThunderLAN Components  
Low-Power CMOS Technology  
– Green PC Compatible  
Switched-Ethernet Compatible  
Full-Duplex Compatible  
– Independent Transmit and Receive  
Channels  
– Two Transmit Channels for Demand  
Priority  
EEPROM Interface Supports Jumperless  
Design and Autoconfiguration  
DMTF (Desktop Management Task Force)  
Compatible  
‡
IEEE Standard 1149.1 Test-Access Port  
No On-Board Memory Required  
(JTAG)  
Auto-Negotiation (N-Way) Compatible  
144-Pin Thin Quad Flat Packages and Quad  
Flat Packages (PCM and PGE Suffix)  
Supports the Card Bus CIS Pointer  
Register  
Early-Receive-Interrupt Count Register  
Hardware Statistics Registers for  
Management-Information Base (MIB)  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
†
‡
The PCI Local-Bus Specification, Revision 2.1 should be used as a reference with this document.  
IEEE Standard 1149.1–1990, IEEE Standard Test-Access Port and Boundary-Scan Architecture  
ThunderLAN and Adaptive Performance Optimization are trademarks of Texas Instruments Incorporated.  
Ethernet is a trademark of Xerox Corporation.  
Microsoft is a trademark of Microsoft Corporation.  
Magic Packet is a trademark of Advanced Micro Devices Corporation.  
Copyright 1996, Texas Instruments Incorporated  
ADVANCE INFORMATION concerns new products in the sampling or  
preproduction phase of development. Characteristic data and other  
specifications are subject to change without notice.  
1
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443  
1234567...26

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