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TNETE110PMPCM PDF预览

TNETE110PMPCM

更新时间： 2024-09-16 19:57:51
品牌 Logo 应用领域
德州仪器 - TI 时钟局域网数据传输外围集成电路
页数 文件大小 规格书
24页 341K
描述
2 CHANNEL(S), 10Mbps, LOCAL AREA NETWORK CONTROLLER, PQFP144, PLASTIC, TQFP-144

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TNETE110PMPCM 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：QFP包装说明：PLASTIC, TQFP-144
针数：144Reach Compliance Code：not_compliant
HTS代码：8542.31.00.01风险等级：5.85
Is Samacsys：N地址总线宽度：32
边界扫描：YES最大时钟频率：33 MHz
数据编码/解码方法：BIPH-LEVEL(MANCHESTER)最大数据传输速率：1.25 MBps
外部数据总线宽度：32JESD-30 代码：S-PQFP-G144
长度：28 mm低功率模式：YES
串行 I/O 数：2端子数量：144
封装主体材料：PLASTIC/EPOXY封装代码：QFP
封装等效代码：QFP144,1.2SQ封装形状：SQUARE
封装形式：FLATPACK峰值回流温度（摄氏度）：NOT SPECIFIED
电源：3/5,5 V认证状态：Not Qualified
座面最大高度：4.1 mm子类别：Serial IO/Communication Controllers
最大压摆率：60 mA最大供电电压：3.6 V
最小供电电压：3 V标称供电电压：3.3 V
表面贴装：YES技术：CMOS
端子形式：GULL WING端子节距：0.65 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：28 mmuPs/uCs/外围集成电路类型：SERIAL IO/COMMUNICATION CONTROLLER, LAN
Base Number Matches：1

TNETE110PMPCM 数据手册

 浏览型号TNETE110PMPCM的Datasheet PDF文件第2页浏览型号TNETE110PMPCM的Datasheet PDF文件第3页浏览型号TNETE110PMPCM的Datasheet PDF文件第4页浏览型号TNETE110PMPCM的Datasheet PDF文件第5页浏览型号TNETE110PMPCM的Datasheet PDF文件第6页浏览型号TNETE110PMPCM的Datasheet PDF文件第7页 
ThunderLAN TNETE110  
PCI ETHERNET CONTROLLER  
SINGLE-CHIP 10 BASE-T  
SPWS018B – MARCH 1995 - REVISED MAY 1996  
Single-Chip Ethernet Adapter for the  
Peripheral Component Interconnect (PCI)  
Local Bus  
– 32-Bit PCI Glueless Host Interface  
– Compliant With PCI Local-Bus  
Specification (Revision 2.0)  
Integrated 10 Base-T and 10 Base-5  
Attachment Unit Interface (AUI) Physical  
Layer Interface  
– Single-Chip IEEE 802.3 and Blue Book  
Ethernet-Compliant Solution  
– DSP-Based Digital Phase-Locked Loop  
(PLL)  
†
– 0-MHz to 33-MHz Operation  
– 3-V or 5-V Input/Output (I/O) Operation  
– Adaptive Performance Optimization  
(APO) by Texas Instruments (TI ) for  
Highest Available PCI Bandwidth  
– High-Performance Bus Master  
Architecture With Byte-Aligning Direct  
Memory Access (DMA) Controller for  
Low Host CPU and Bus Utilization  
– Plug-and-Play Compatible  
– Smart Squelch Allows for Transparent  
Link Testing  
– Transmission Waveshaping  
– Autopolarity (Reverse Polarity  
Correction)  
– External/Internal Loopback Including  
Twisted Pair and AUI  
– 10 Base-2 Supported Through AUI  
Interface  
Supports 32-Bit Data Streaming on PCI Bus  
– Time Division Multiplexed Static  
Random-Access Memory (SRAM)  
– 2-Gbps Internal Bandwidth  
Low-Power CMOS Technology  
– Green PC Compatible  
– Microsoft Advanced Power  
Management  
– Driver Compatible With All Previous  
ThunderLAN Components  
EEPROM Interface Supports Jumperless  
Design and Autoconfiguration  
Switched Ethernet Compatible  
Hardware Statistics Registers for  
Full-Duplex Compatible With Independent  
Transmit and Receive Channels  
Management Information Base (MIB)  
DMTF (Desktop Management Task Force)  
Compatible  
No On-Board Memory Required  
‡
Auto-Negotiation (N-Way) Compatible  
IEEE Standard 1149.1 Test-Access Port  
144-Pin Quad Flat Package (PCE Suffix)  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
†
‡
The PCI Local-Bus Specification, Revision 2.0 should be used as a reference with this document.  
IEEE Standard 1149.1–1990, IEEE Standard Test-Access Port and Boundary-Scan Architecture  
ThunderLAN, Adaptive Performance Optimization, and TI are trademarks of Texas Instruments Incorporated.  
Ethernet is a trademark of Xerox Corporation.  
Microsoft is a registered trademark of Microsoft Corp.  
Copyright 1996, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443  
1234567...24

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