5秒后页面跳转
SY100S325JY-TR PDF预览

SY100S325JY-TR

更新时间: 2024-11-11 15:53:19
品牌 Logo 应用领域
美国微芯 - MICROCHIP 输出元件接口集成电路锁存器
页数 文件大小 规格书
5页 100K
描述
HEX ECL TO TTL TRANSLATOR, TRUE OUTPUT, PQCC28

SY100S325JY-TR 技术参数

是否Rohs认证:符合生命周期:Obsolete
包装说明:QCCJ,Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.66Is Samacsys:N
最大延迟:3.7 ns接口集成电路类型:ECL TO TTL TRANSLATOR
JESD-30 代码:S-PQCC-J28JESD-609代码:e3
长度:11.48 mm湿度敏感等级:2
位数:1功能数量:6
端子数量:28最高工作温度:85 °C
最低工作温度:-40 °C输出锁存器或寄存器:NONE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):245
认证状态:Not Qualified座面最大高度:4.57 mm
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:MATTE TIN
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
宽度:11.48 mmBase Number Matches:1

SY100S325JY-TR 数据手册

 浏览型号SY100S325JY-TR的Datasheet PDF文件第2页浏览型号SY100S325JY-TR的Datasheet PDF文件第3页浏览型号SY100S325JY-TR的Datasheet PDF文件第4页浏览型号SY100S325JY-TR的Datasheet PDF文件第5页 
NOT RECOMMENDED FOR NEW DESIGNS  
LOW-POWERHEX  
ECL-to-TTL  
SY100S325  
TRANSLATOR  
DESCRIPTION  
FEATURES  
Max. propagation delay of 3.7ns  
IEE min. of –37mA  
The SY100S325 are hex translators for converting  
100K ECL logic levels to TTL logic levels. Inputs can be  
used as inverting, non-inverting or differential receivers.  
An internal reference voltage generator provides VBB for  
single-ended operation or for use in Schmitt trigger  
applications. All inputs have 75Kpull-down resistors.  
The outputs will go LOW when the inputs are either open  
or have the same potential.  
When used in single-ended operation, the apparent  
input threshold of the true inputs is 20mV to 40mV higher  
(positive) than the threshold of the complementary inputs.  
The VTTL and VEE power may be applied in either order.  
TTL outputs  
Extended supply voltage option:  
VEE = –4.2V to –5.5V  
25% faster than National's 325  
Differential inputs with built-in offset  
Voltage and temperature compensation for improved  
noise immunity  
VBB output for single-ended use  
Internal 75Kinput pull-down resistors  
Function and pinout compatible with Fairchild F100K  
Available in 28-pin PLCC package  
PIN NAMES  
BLOCK DIAGRAM  
Pin  
D0–D5  
Function  
V
BB  
Data Inputs  
D
D
0
0
D0–D5  
Q0–Q5  
VEES  
Inverting Data Inputs  
Data Outputs  
Q
Q
Q
Q
Q
Q
0
1
2
3
4
5
D
D
1
1
VEE Substrate  
VTTL  
TTL VCC Power Supply  
VCCO for ECL Outputs  
D
D
2
2
VCCA  
D
D
3
3
D
D
4
4
D
D
5
5
Rev.: I  
Amendment:/0  
M9999-051607  
hbwhelp@micrel.com or (408) 955-1690  
1
Issue Date: May 2007  

与SY100S325JY-TR相关器件

型号 品牌 获取价格 描述 数据表
SY100S331 MICREL

获取价格

TRIPLE D FLIP-FLOP
SY100S331_06 MICREL

获取价格

TRIPLE D FLIP-FLOP
SY100S331_10 MICREL

获取价格

TRIPLE D FLIP-FLOP
SY100S331DC ETC

获取价格

Triple D-Type Flip-Flop
SY100S331FC MICREL

获取价格

TRIPLE D FLIP-FLOP
SY100S331FCTR MICREL

获取价格

TRIPLE D FLIP-FLOP
SY100S331JC MICREL

获取价格

TRIPLE D FLIP-FLOP
SY100S331JCTR MICREL

获取价格

TRIPLE D FLIP-FLOP
SY100S331JY MICREL

获取价格

TRIPLE D FLIP-FLOP
SY100S331JYTR MICREL

获取价格

TRIPLE D FLIP-FLOP