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SY100EL33LZG PDF预览

SY100EL33LZG

更新时间: 2024-09-21 05:16:11
品牌 Logo 应用领域
麦瑞 - MICREL 逻辑集成电路光电二极管时钟
页数 文件大小 规格书
4页 53K
描述
5V/3.3V ± 2 DIVIDER

SY100EL33LZG 数据手册

 浏览型号SY100EL33LZG的Datasheet PDF文件第2页浏览型号SY100EL33LZG的Datasheet PDF文件第3页浏览型号SY100EL33LZG的Datasheet PDF文件第4页 
®
Precision Edge  
SY10EL32V
SY100EL32V  
5V/3.3V ÷ 2 DIVIDER  
FEATURES  
3.3V and 5V power supply options  
510ps propagation delay  
®
Precision Edge  
3.0GHz toggle frequency  
DESCRIPTION  
High bandwidth output transistions  
Internal 75Kinput pull-down resistors  
Available in 8-pin SOIC package  
The SY10/100EL32V are integrated ÷2 dividers. The  
differential clock inputs and the VBB allow a differential,  
single-ended or AC-coupled interface to the device. If  
used, the VBB output should be bypassed to ground with  
a 0.01µF capacitor. Also note that the VBB is designed to  
be used as an input bias on the EL32V only; the VBB  
output has limited current sink and source capability.  
The reset pin is asynchronous and is asserted on the  
rising edge. Upon power-on, the internal flip-flop will attain  
a random state; the reset allows for the synchronization  
of multiple EL32Vs in a system.  
PIN NAMES  
Pin  
CLK  
Function  
Clock Inputs  
Reset  
VBB  
Q
Asynchronous Reset  
Reference Voltage Output  
Data Outputs  
Precision Edge is a registered trademark of Micrel, Inc.  
Rev.: E  
Amendment:/0  
M9999-120705  
hbwhelp@micrel.com or (408) 955-1690  
1
1
Issue Date: December2005  

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