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SY100EL35

更新时间： 2024-11-09 05:16:11

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SY100EL35 数据手册

SY10EL35

Micrel, Inc.

SY100EL35

SY10EL35

JK FLIP-FLOP

SY100EL35

FEATURES

DESCRIPTION

■ 525ps propagation delay

The SY10/100EL35 are high-speed JK Flip-Flops. The

J/K data enters the master portion of the flip-flop when

the clock is LOW and is transferred to the slave and,

thus, the outputs, upon a positive transition of the clock.

The reset pin is asynchronous and is activated with a

logic HIGH.

■ 2.2GHz toggle frequency

■ High bandwidth output transistions

■ Internal 75KΩ input pull-down resistors

■ Available in 8-pin SOIC package

(1)

TRUTH TABLE

CLK

Qn+1

NOTE:

1. Z = LOW-to-HIGH transition.

Rev.: G

Amendment:/0

M9999-121205

hbwhelp@micrel.com or (408) 955-1690

Issue Date: December2005

12 3 4

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型号	品牌	获取价格	描述	数据表
SY100EL35LZC	MICREL	获取价格	JK FLIP-FLOP
SY100EL35LZCTR	MICREL	获取价格	JK FLIP-FLOP
SY100EL35LZG	MICREL	获取价格	JK FLIP-FLOP
SY100EL35LZGTR	MICREL	获取价格	JK FLIP-FLOP
SY100EL35LZI	MICREL	获取价格	JK FLIP-FLOP
SY100EL35LZITR	MICREL	获取价格	JK FLIP-FLOP
SY100EL35LZITR	MICROCHIP	获取价格	100EL SERIES, POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8, 0.150 IN
SY100EL35LZI-TR	MICROCHIP	获取价格	100EL SERIES, POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8
SY100EL35ZC	MICREL	获取价格	JK FLIP-FLOP
SY100EL35ZCTR	MICREL	获取价格	JK FLIP-FLOP