Datasheet > SY100EL35ZC

SY100EL35ZC

更新时间： 2024-02-27 04:07:43

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SY100EL35ZC 技术参数

SY10EL35

SY100EL35

JK FLIP-FLOP

FEATURES

DESCRIPTION

■ 525ps propagation delay

The SY10/100EL35 are high-speed JK Flip-Flops. The

J/K data enters the master portion of the flip-flop when

the clock is LOW and is transferred to the slave and,

thus, the outputs, upon a positive transition of the clock.

The reset pin is asynchronous and is activated with a

logic HIGH.

■ 2.2GHz toggle frequency

■ High bandwidth output transistions

■ Internal 75KΩ input pull-down resistors

■ Available in 8-pin SOIC package

(1)

PIN CONFIGURATION/BLOCK DIAGRAM

TRUTH TABLE

CLK

Qn+1

VCC

CLK

NOTE:

1. Z = LOW-to-HIGH transition.

SOIC

TOP VIEW

Rev.: E

Amendment:/0

Issue Date: August, 1998

12 3 4

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型号	品牌	获取价格	描述	数据表
SY100EL35ZCTR	MICREL	获取价格	JK FLIP-FLOP
SY100EL38LZC	MICREL	获取价格	5V/3.3V ÷2, ÷4/6 CLOCK GENERATION CHIP
SY100EL38LZCTR	MICREL	获取价格	5V/3.3V ÷2, ÷4/6 CLOCK GENERATION CHIP
SY100EL38LZG	MICREL	获取价格	5V/3.3V ÷2, ÷4/6 CLOCK GENERATION CHIP
SY100EL38LZG	MICROCHIP	获取价格	100EL SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
SY100EL38LZGTR	MICREL	获取价格	5V/3.3V ÷2, ÷4/6 CLOCK GENERATION CHIP
SY100EL38LZI	MICROCHIP	获取价格	Low Skew Clock Driver, 100EL Series, 4 True Output(s), 0 Inverted Output(s), ECL, PDSO20,
SY100EL38LZI	MICREL	获取价格	5V/3.3V ÷2, ÷4/6 CLOCK GENERATION CHIP
SY100EL38LZITR	MICREL	获取价格	5V/3.3V ÷2, ÷4/6 CLOCK GENERATION CHIP
SY100EL51	MICREL	获取价格	DIFFERENTIAL CLOCK D FLIP-FLOP