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SSM6P25TU(5LOMII,F PDF预览

SSM6P25TU(5LOMII,F

更新时间： 2024-09-22 19:45:11
品牌 Logo 应用领域
东芝 - TOSHIBA 开关光电二极管晶体管
页数 文件大小 规格书
6页 186K
描述
Small Signal Field-Effect Transistor, 0.5A I(D), 20V, 2-Element, P-Channel, Silicon, Metal-Oxide Semiconductor FET

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SSM6P25TU(5LOMII,F 技术参数

生命周期：Obsolete包装说明：SMALL OUTLINE, R-PDSO-F6
Reach Compliance Code：unknown风险等级：5.76
配置：SEPARATE, 2 ELEMENTS WITH BUILT-IN DIODE最小漏源击穿电压：20 V
最大漏极电流 (ID)：0.5 A最大漏源导通电阻：0.43 Ω
FET 技术：METAL-OXIDE SEMICONDUCTORJESD-30 代码：R-PDSO-F6
元件数量：2端子数量：6
工作模式：ENHANCEMENT MODE封装主体材料：PLASTIC/EPOXY
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
极性/信道类型：P-CHANNEL表面贴装：YES
端子形式：FLAT端子位置：DUAL
晶体管应用：SWITCHING晶体管元件材料：SILICON
Base Number Matches：1

SSM6P25TU(5LOMII,F 数据手册

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SSM6P25TU  
TOSHIBA Field Effect Transistor Silicon P Channel MOS Type (U-MOSIII)  
SSM6P25TU  
High Speed Switching Applications  
Unit: mm  
•
Optimum for high-density mounting in small packages  
•
Low on-resistance:  
R
= 260mΩ (max) (@V  
= 430mΩ (max) (@V  
= -4 V)  
on  
on  
GS  
GS  
2.1±0.1  
1.7±0.1  
R
= -2.5 V)  
Absolute Maximum Ratings (Ta = 25°C)  
(Q1, Q2 Common)  
1
2
6
5
Characteristics  
Drain-Source voltage  
Symbol  
Rating  
Unit  
4
3
V
-20  
± 12  
-0.5  
-1.5  
V
V
DS  
Gate-Source voltage  
V
GSS  
DC  
I
D
Drain current  
A
Pulse  
I
DP  
P
D
Drain power dissipation  
Channel temperature  
500  
mW  
1.Source1 4.Source2  
(Note 1)  
2.Gate1  
3.Drain2  
5.Gate2  
6.Drain1  
T
ch  
150  
°C  
°C  
Storage temperature range  
T
stg  
−55 to 150  
UF6  
Note: Using continuously under heavy loads (e.g. the application of  
high temperature/current/voltage and the significant change in  
temperature, etc.) may cause this product to decrease in the  
reliability significantly even if the operating conditions (i.e.  
operating temperature/current/voltage, etc.) are within the  
absolute maximum ratings.  
JEDEC  
JEITA  
―
―
TOSHIBA  
2-2T1B  
Weight: 7.0 mg (typ.)  
Please design the appropriate reliability upon reviewing the  
Toshiba Semiconductor Reliability Handbook (“Handling  
Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and  
estimated failure rate, etc).  
Note 1: Mounted on FR4 board. (total dissipation)  
(25.4 mm × 25.4 mm × 1.6 t, Cu Pad: 645 mm2 )  
Marking  
Equivalent Circuit (top view)  
6
5
4
6
5
4
Q1  
PH  
Q2  
1
2
3
1
2
3
Handling Precaution  
When handling individual devices (which are not yet mounted on a circuit board), be sure that the environment is  
protected against electrostatic electricity. Operators should wear anti-static clothing, and containers and other objects  
that come into direct contact with devices should be made of anti-static materials.  
Start of commercial production  
2004-03  
1
2014-03-01  
123456

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