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SSM6P26TU PDF预览

SSM6P26TU

更新时间: 2024-02-27 13:56:16
品牌 Logo 应用领域
东芝 - TOSHIBA 晶体开关小信号场效应晶体管光电二极管
页数 文件大小 规格书
6页 152K
描述
High Speed Switching Applications

SSM6P26TU 技术参数

生命周期:Obsolete包装说明:SMALL OUTLINE, R-PDSO-F6
针数:6Reach Compliance Code:unknown
ECCN代码:EAR99风险等级:5.83
Is Samacsys:N配置:SEPARATE, 2 ELEMENTS WITH BUILT-IN DIODE
最小漏源击穿电压:20 V最大漏极电流 (Abs) (ID):0.5 A
最大漏极电流 (ID):0.5 A最大漏源导通电阻:0.98 Ω
FET 技术:METAL-OXIDE SEMICONDUCTORJESD-30 代码:R-PDSO-F6
JESD-609代码:e0元件数量:2
端子数量:6工作模式:ENHANCEMENT MODE
最高工作温度:150 °C封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
极性/信道类型:P-CHANNEL最大功率耗散 (Abs):0.5 W
认证状态:Not Qualified子类别:Other Transistors
表面贴装:YES端子面层:TIN LEAD
端子形式:FLAT端子位置:DUAL
晶体管应用:SWITCHING晶体管元件材料:SILICON
Base Number Matches:1

SSM6P26TU 数据手册

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SSM6P26TU  
TOSHIBA Field Effect Transistor Silicon P Channel MOS Type (U-MOSIII)  
SSM6P26TU  
High Speed Switching Applications  
Unit: mm  
Optimum for high-density mounting in small packages  
2.1±0.1  
1.7±0.1  
Low on-resistance:  
R
on  
R
on  
R
on  
= 230m(max) (@V  
= 330m(max) (@V  
= 980m(max) (@V  
= -4 V)  
GS  
GS  
GS  
= -2.5 V)  
= -1.8 V)  
1
2
6
5
Absolute Maximum Ratings (Ta = 25°C)  
(Q1, Q2 Common)  
4
3
Characteristics  
Drain-Source voltage  
Symbol  
Rating  
Unit  
V
-20  
± 8  
V
V
DS  
Gate-Source voltage  
V
GSS  
DC  
I
-0.5  
-1.5  
D
Drain current  
A
1.Source1 4.Source2  
Pulse  
I
DP  
2.Gate1  
3.Drain2  
5.Gate2  
6.Drain1  
P
D
Drain power dissipation  
Channel temperature  
500  
mW  
(Note 1)  
T
ch  
150  
°C  
°C  
Storage temperature range  
T
stg  
55~150  
UF6  
JEDEC  
JEITA  
Note: Using continuously under heavy loads (e.g. the application of  
high temperature/current/voltage and the significant change in  
temperature, etc.) may cause this product to decrease in the  
reliability significantly even if the operating conditions (i.e.  
operating temperature/current/voltage, etc.) are within the  
absolute maximum ratings.  
TOSHIBA  
2-2T1B  
Weight: 7.0 mg (typ.)  
Please design the appropriate reliability upon reviewing the  
Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and  
individual reliability data (i.e. reliability test report and estimated failure rate, etc).  
Note 1: Mounted on FR4 board. (total dissipation)  
2
(25.4 mm × 25.4 mm × 1.6 t, Cu Pad: 645 mm )  
Marking  
Equivalent Circuit (top view)  
6
5
4
6
5
4
Q1  
PI  
Q2  
1
2
3
1
2
3
Handling Precaution  
When handling individual devices (which are not yet mounted on a circuit board), be sure that the environment is  
protected against electrostatic electricity. Operators should wear anti-static clothing, and containers and other objects  
that come into direct contact with devices should be made of anti-static materials.  
1
2007-11-01  

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