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SN75LVDS83ZQL

更新时间： 2024-11-20 19:55:03
品牌 Logo 应用领域
德州仪器 - TI 驱动接口集成电路
页数 文件大小 规格书
21页 696K
描述
FlatLink(TM) Transmitter 56-BGA MICROSTAR JUNIOR -10 to 70

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中文翻译

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SN75LVDS83ZQL 技术参数

是否无铅： 含铅生命周期：Obsolete
包装说明：,Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.7接口集成电路类型：LINE DRIVER
最大接收延迟：Base Number Matches：1

SN75LVDS83ZQL 数据手册

 浏览型号SN75LVDS83ZQL的Datasheet PDF文件第2页浏览型号SN75LVDS83ZQL的Datasheet PDF文件第3页浏览型号SN75LVDS83ZQL的Datasheet PDF文件第4页浏览型号SN75LVDS83ZQL的Datasheet PDF文件第5页浏览型号SN75LVDS83ZQL的Datasheet PDF文件第6页浏览型号SN75LVDS83ZQL的Datasheet PDF文件第7页 
Not Recommended for New Designs  
ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢀ ꢇꢈ  
ꢐ ꢑꢒꢁ ꢀꢓ ꢔ ꢐꢐ ꢕꢑ  
ꢉ
ꢊ
ꢋ
ꢌꢄ  
ꢍ
ꢎ
ꢏ
SLLS271I − MARCH 1997 − REVISED MAY 2009  
DGG PACKAGE  
(TOP VIEW)  
D
D
4:28 Data Channel Compression at up to  
238 MBytes/s Throughput  
Suited for SVGA, XGA, or SXGA Display  
Data Transmission From Controller to  
Display With Very Low EMI  
V
D4  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
CC  
D5  
D3  
2
D6  
D7  
D2  
3
D
D
D
D
D
D
28 Data Channels and Clock-In Low-Voltage  
TTL  
GND  
D1  
4
GND  
D8  
5
D0  
6
4 Data Channels and Clock-Out  
Low-Voltage Differential  
D9  
D27  
LVDSGND  
Y0M  
Y0P  
Y1M  
7
D10  
8
Operates From a Single 3.3-V Supply With  
250 mW (Typ)  
V
9
CC  
D11  
D12  
10  
11  
ESD Protection Exceeds 6 kV  
5-V Tolerant Data Inputs  
45 Y1P  
D13 12  
GND 13  
D14 14  
Selectable Rising or Falling Edge-Triggered  
Inputs  
44 LVDSV  
CC  
43 LVDSGND  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
D15  
D16  
Y2M  
D
Packaged in Thin Shrink Small-Outline  
Package With 20-Mil Terminal Pitch  
Y2P  
CLKSEL  
D17  
CLKOUTM  
CLKOUTP  
Y3M  
D
Consumes Less Than 1 mW When Disabled  
D
Wide Phase-Lock Input Frequency  
Range . . . 31 MHz to 68 MHz  
D18  
D19  
Y3P  
D
D
D
No External Components Required for PLL  
GND  
D20  
LVDSGND  
PLLGND  
Outputs Meet or Exceed the Requirements  
of ANSI EIA/TIA-644 Standard  
D21  
PLLV  
CC  
Improved Replacement for the DS90C581  
D22  
PLLGND  
SHTDN  
CLKIN  
D26  
D23  
description  
V
CC  
D24  
D25  
The SN75LVDS83 FlatLink transmitter contains  
four 7-bit parallel-load serial-out shift registers, a  
GND  
7× clock synthesizer, and five low-voltage  
differential-signaling (LVDS) line drivers in a single integrated circuit. These functions allow 28 bits of  
single-ended low-voltage TTL (LVTTL) data to be synchronously transmitted over five balanced-pair conductors  
for receipt by a compatible receiver, such as the SN75LVDS82. The SN75LVDS83 can also be used in 21-bit  
links with the SN75LVDS86 receiver.  
When transmitting, data bits D0 through D27 are each loaded into registers upon the edge of the input clock  
signal (CLKIN). The rising or falling edge of the clock can be selected by way of the clock select (CLKSEL)  
terminal. The frequency of CLKIN is multiplied seven times (7×) and then used to unload the data registers in  
7-bit slices and serially. The four serial streams and a phase-locked clock (CLKOUT) are then output to LVDS  
output drivers. The frequency of CLKOUT is the same as the input clock, CLKIN.  
The SN75LVDS83 requires no external components and little or no control. The data bus appears the same  
at the input to the transmitter and output of the receiver with the data transmission transparent to the user. The  
only user intervention is the possible use of the shutdown/clear (SHTDN) active-low input to inhibit the clock  
and shut off the LVDS output drivers for lower power consumption. A low-level signal on SHTDN clears all  
internal registers to a low level.  
The SN75LVDS83 is characterized for operation over free-air temperature ranges of 0_C to 70_C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
FlatLink is a registered trademark of Texas Instruments.  
ꢖꢑ ꢗ ꢆꢘ ꢙ ꢐꢔ ꢗ ꢁ ꢆ ꢒꢐꢒ ꢍꢎ ꢚ ꢛꢜ ꢝꢋ ꢌꢍꢛ ꢎ ꢍꢞ ꢟꢠ ꢜ ꢜ ꢡꢎꢌ ꢋꢞ ꢛꢚ ꢢꢠꢣ ꢊꢍꢟ ꢋꢌ ꢍꢛꢎ ꢤꢋ ꢌꢡ ꢥ  
ꢖꢜ ꢛ ꢤꢠꢟ ꢌ ꢞ ꢟ ꢛꢎ ꢚꢛ ꢜ ꢝ ꢌ ꢛ ꢞ ꢢꢡ ꢟ ꢍꢚ ꢍꢟꢋ ꢌꢍ ꢛꢎꢞ ꢢꢡ ꢜ ꢌꢦ ꢡ ꢌꢡ ꢜ ꢝꢞ ꢛꢚ ꢐꢡꢧ ꢋꢞ ꢔꢎꢞ ꢌꢜ ꢠꢝ ꢡꢎꢌ ꢞ  
ꢞ ꢌ ꢋ ꢎꢤ ꢋ ꢜꢤ ꢨ ꢋ ꢜꢜ ꢋ ꢎ ꢌꢩꢥ ꢖꢜ ꢛ ꢤꢠꢟ ꢌꢍꢛꢎ ꢢꢜ ꢛꢟ ꢡꢞ ꢞꢍ ꢎꢪ ꢤꢛꢡ ꢞ ꢎꢛꢌ ꢎꢡ ꢟꢡ ꢞꢞ ꢋꢜ ꢍꢊ ꢩ ꢍꢎꢟ ꢊꢠꢤ ꢡ  
ꢌ ꢡ ꢞ ꢌꢍ ꢎꢪ ꢛꢚ ꢋ ꢊ ꢊ ꢢꢋ ꢜ ꢋ ꢝ ꢡ ꢌ ꢡ ꢜ ꢞ ꢥ  
Copyright 1997 − 2009, Texas Instruments Incorporated  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...21

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