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SN75LVDS84ADGG PDF预览

SN75LVDS84ADGG

更新时间： 2024-11-19 22:53:31
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
14页 192K
描述
FLATLINKE TRANSMITTER

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SN75LVDS84ADGG 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：TSSOP
包装说明：TSSOP, TSSOP48,.3,20针数：48
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：6 weeks
风险等级：0.66差分输出：YES
驱动器位数：4高电平输入电流最大值：0.000025 A
输入特性：STANDARD接口集成电路类型：LINE DRIVER
接口标准：EIA-644; TIA-644JESD-30 代码：R-PDSO-G48
JESD-609代码：e4长度：12.5 mm
湿度敏感等级：2功能数量：4
端子数量：48最高工作温度：70 °C
最低工作温度：输出特性：TOTEM-POLE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP48,.3,20
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：260电源：3.3 V
认证状态：Not Qualified最大接收延迟：
座面最大高度：1.2 mm子类别：Line Driver or Receivers
最大压摆率：39 mA最大供电电压：3.6 V
最小供电电压：3 V标称供电电压：3.3 V
电源电压1-最大：3.6 V电源电压1-分钟：3 V
电源电压1-Nom：3.3 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：6.1 mm
Base Number Matches：1

SN75LVDS84ADGG 数据手册

 浏览型号SN75LVDS84ADGG的Datasheet PDF文件第2页浏览型号SN75LVDS84ADGG的Datasheet PDF文件第3页浏览型号SN75LVDS84ADGG的Datasheet PDF文件第4页浏览型号SN75LVDS84ADGG的Datasheet PDF文件第5页浏览型号SN75LVDS84ADGG的Datasheet PDF文件第6页浏览型号SN75LVDS84ADGG的Datasheet PDF文件第7页 
SN75LVDS84A  
FLATLINK TRANSMITTER  
SLLS354C – MAY 1999 – REVISED NOVEMBER 1999  
DGG PACKAGE  
(TOP VIEW)  
21:3 Data Channel Compression at up to  
196 Million Bytes per Second Throughput  
Suited for SVGA, XGA, or SXGA Data  
Transmission From Controller to Display  
With Very Low EMI  
D4  
D3  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
V
D2  
2
CC  
D5  
GND  
D1  
3
21 Data Channels Plus Clock In  
D6  
4
Low-Voltage TTL inputs and 3 Data  
Channels Plus Clock Out Low-Voltage  
Differential Signaling (LVDS) Outputs  
GND  
D7  
D0  
5
NC  
6
D8  
LVDSGND  
Y0M  
Y0P  
Y1M  
Y1P  
7
Operates From a Single 3.3-V Supply and  
89 mW (Typ)  
V
8
CC  
D9  
D10  
9
10  
11  
Ultra Low Power 3.3-V CMOS Version of the  
SN75LVDS84. Power Consumption About  
One Third of the ’LVDS84  
GND  
D11 12  
D12 13  
NC 14  
37 LVDSV  
CC  
36 LVDSGND  
35 Y2M  
Packaged in Thin Shrink Small-Outline  
Package (TSSOP) With 20 Mil Terminal  
Pitch  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
D13  
D14  
GND  
D15  
D16  
D17  
Y2P  
CLKOUTM  
CLKOUTP  
LVDSGND  
PLLGND  
Consumes Less Than 0.54 mW When  
Disabled  
Wide Phase-Lock Input Frequency Range:  
31 MHz to 75 MHz  
PLLV  
CC  
No External Components Required for PLL  
V
PLLGND  
SHTDN  
CLKIN  
D20  
CC  
Outputs Meet or Exceed the Requirements  
of ANSI EIA/TIA–644 Standard  
D18  
D19  
GND  
SSC Tracking Capability of 3% Center  
Spread at 50-kHz Modulation Frequency  
NC – Not Connected  
Improved Replacement for SN75LVDS84  
and NSC’s DS90CF363A 3-V Device  
description  
The SN75LVDS84A FlatLink transmitter contains three 7-bit parallel-load serial-out shift registers, and four  
low-voltage differential signaling (LVDS) line drivers in a single integrated circuit. These functions allow 21 bits  
of single-ended LVTTL data to be synchronously transmitted over 3 balanced-pair conductors for receipt by a  
compatible receiver, such as the SN75LVDS82 or SN75LVDS86/86A.  
When transmitting, data bits D0 – D20 are each loaded into registers of the ’LVDS84A upon the falling edge.  
The internal PLL is frequency-locked to CLKIN and then used to unload the data registers in 7-bit slices. The  
threeserialstreamsandaphase-lockedclock(CLKOUT)arethenoutputtoLVDSoutputdrivers. Thefrequency  
of CLKOUT is the same as the input clock, CLKIN.  
The ’LVDS84A requires no external components and little or no control. The data bus appears the same at the  
input to the transmitter and output of the receiver with the data transmission transparent to the user(s). The only  
user intervention is the possible use of the shutdown/clear (SHTDN) active-low input to inhibit the clock and shut  
off the LVDS output drivers for lower power consumption. A low-level on this signal clears all internal registers  
to a low level.  
The SN75LVDS84A is characterized for operation over ambient free-air temperatures of 0 C to 70 C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
FlatLink is a trademark of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...14

中文翻译

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SN75LVDS84ADGG 替代型号

型号 品牌 替代类型 描述 数据表
SN75LVDS84ADGGRG4 TI

完全替代

 FLATLINK TRANSMITTER
SN75LVDS84ADGGG4 TI

完全替代

 FLATLINK TRANSMITTER
SN65LVDS95DGG TI

类似代替

 LVDS SERDES TRANSMITTER

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SN75LVDS84DGG TI

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SN75LVDS84DGGG4 TI

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 		Flatlink™ 变送器 | DGG | 48 | 0 to 70
SN75LVDS84DGGR ROCHESTER

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 		LINE DRIVER, PDSO48, GREEN, PLASTIC, TSSOP-48
SN75LVDS84DGGR TI

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 		FlatLink™ Transmitter 48-TSSOP 0 to 70
SN75LVDS85 TI

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 		FLATLINKE TRANSMITTERS

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