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SN75LVDS88APFD PDF预览

SN75LVDS88APFD

更新时间： 2024-11-24 19:19:51
品牌 Logo 应用领域
德州仪器 - TI 外围集成电路
页数 文件大小 规格书
12页 147K
描述
TFT LCD-Panel Timing Controller with LVDS Interface 100-HTQFP 0 to 70

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SN75LVDS88APFD 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：QFP
包装说明：HTFQFP,针数：100
Reach Compliance Code：not_compliantHTS代码：8542.31.00.01
风险等级：5.88JESD-30 代码：S-PQFP-G100
长度：14 mm端子数量：100
最高工作温度：70 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：HTFQFP
封装形状：SQUARE封装形式：FLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED认证状态：Not Qualified
座面最大高度：1.2 mm最大供电电压：3.6 V
最小供电电压：3 V标称供电电压：3.3 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子形式：GULL WING
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：14 mm
uPs/uCs/外围集成电路类型：MICROPROCESSOR CIRCUITBase Number Matches：1

SN75LVDS88APFD 数据手册

 浏览型号SN75LVDS88APFD的Datasheet PDF文件第2页浏览型号SN75LVDS88APFD的Datasheet PDF文件第3页浏览型号SN75LVDS88APFD的Datasheet PDF文件第4页浏览型号SN75LVDS88APFD的Datasheet PDF文件第5页浏览型号SN75LVDS88APFD的Datasheet PDF文件第6页浏览型号SN75LVDS88APFD的Datasheet PDF文件第7页 
SN75LVDS88A  
TFT LCD PANEL TIMING CONTROLLER  
WITH LVDS INTERFACE  
SLLS398 – DECEMBER 1999  
Flatlink Interface Utilizes Low Power  
Differential Signalling(LVDS)  
Low Voltage CMOS 3.3 V Technology  
65 MHz Phase-Lock Input  
Suitable for Notebook Application  
XGA Resolution  
100-pin TQFP Package for Compact LCD  
Module  
Six Bit System Interface  
Tolerates 4 kV HBM ESD for LVDS Pins and  
2 kV HBM for Others  
Support Mainstream Data and Gate Drivers  
Optional Configurable Pins  
Improved Jitter Tolerance  
description  
The SN75LVDS88A (LVDS panel timing controller) integrates a Flatlink signal interface with a TFT LCD timing  
controller. It resides in the LCD panel and provides interface between the graphic controller and a TFT LCD  
panel.  
The SN75LVDS88A accepts host data through 3 pairs of inputs (18-bits) making up the LVDS bus, which is a  
low-EMI high-throughput interface. SN75LVDS88A then reformats the received image data into a specific data  
format and synchronous timing suitable for driving LCD panel column and row drivers. This device supports  
XGA resolution.  
The SN75LVDS88A is easily configured by several selection terminals and is equipped with default timing  
specifications to support mainstream gate and source drivers on the market.  
block diagram  
Data Alignment  
Source  
Data  
Format  
SYNC  
Flat Link  
(18-bit)  
Timing  
Signal  
CTRL  
Generator  
Interface  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...12

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