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SN75LVDS88TQFP PDF预览

SN75LVDS88TQFP

更新时间: 2024-11-23 22:24:11
品牌 Logo 应用领域
德州仪器 - TI 控制器
页数 文件大小 规格书
12页 151K
描述
TFT LCD PANEL TIMING CONTROLLER WITH LVDS INTERFACE

SN75LVDS88TQFP 数据手册

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SN75LVDS88  
TFT LCD PANEL TIMING CONTROLLER  
WITH LVDS INTERFACE  
SLLS344 – OCTOBER 1999  
Flatlink Interface Utilizes Low Power  
Differential Signalling(LVDS)  
Low Voltage CMOS 3.3 V Technology  
65 MHz Phase-Lock Input  
Suitable for Notebook Application  
XGA Resolution  
100-pin TQFP Package for Compact LCD  
Module  
Six Bit System Interface  
Tolerates 4 kV HBM ESD for LVDS Pins and  
2 kV HBM for Others  
Support Mainstream Data and Gate Drivers  
Optional Configurable Pins  
Improved Jitter Tolerance  
description  
The SN75LVDS88 (LVDS panel timing controller) integrates a Flatlink signal interface with a TFT LCD timing  
controller. It resides in the LCD panel and provides interface between the graphic controller and a TFT LCD  
panel.  
The SN75LVDS88 accepts host data through 3 pairs of inputs (18-bits) making up the LVDS bus, which is a  
low-EMI high-throughput interface. SN75LVDS88 then reformats the received image data into a specific data  
format and synchronous timing suitable for driving LCD panel column and row drivers. This device supports  
XGA resolution.  
The SN75LVDS88 is easily configured by several selection terminals and is equipped with default timing  
specifications to support mainstream gate and source drivers on the market.  
block diagram  
Data Alignment  
Source  
Data  
Format  
SYNC  
Flat Link  
(18-bit)  
Timing  
Signal  
CTRL  
Generator  
Interface  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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