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SN74LVCH245AQDWRQ1 PDF预览

SN74LVCH245AQDWRQ1

更新时间： 2024-01-14 11:26:46
品牌 Logo 应用领域
德州仪器 - TI 总线收发器输出元件
页数 文件大小 规格书
9页 170K
描述
OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

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SN74LVCH245AQDWRQ1 数据手册

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SN74LVCH245A-Q1  
OCTAL BUS TRANSCEIVER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES493A–SEPTEMBER 2003–REVISED DECEMBER 2005  
FEATURES  
DW OR PW PACKAGE  
(TOP VIEW)  
(1)  
•
•
•
Qualification in Accordance With AEC-Q100  
Qualified for Automotive Applications  
DIR  
A1  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
Customer-Specific Configuration Control Can  
Be Supported Along With Major-Change  
Approval  
19 OE  
18 B1  
A2  
A3  
A4  
B2  
B3  
17  
16  
•
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
A5  
A6  
A7  
A8  
15 B4  
14 B5  
13 B6  
12 B7  
•
•
•
•
Operates From 2 V to 3.6 V  
Inputs Accept Voltages to 5.5 V  
Max tpd of 7 ns at 3.3 V  
11  
GND  
B8  
Typical VOLP (Output Ground Bounce)  
<0.8 V at VCC = 3.3 V, TA = 25°C  
•
•
Typical VOHV (Output VOH Undershoot)  
>2 V at VCC = 3.3 V, TA = 25°C  
Supports Mixed-Mode Signal Operation on All  
Ports (5-V Input/Output Voltage With  
3.3-V VCC  
)
•
•
Ioff Supports Partial-Power-Down Mode  
Operation  
Bus Hold on Data Inputs Eliminates the Need  
for External Pullup/Pulldown Resistors  
(1) Contact factory for details. Q100 qualification data available  
on request.  
DESCRIPTION/ORDERING INFORMATION  
The SN74LVCH245A octal bus transceiver is designed for 2.7-V to 3.6-V VCC operation.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in  
a mixed 3.3-V/5-V system environment.  
This device is designed for asynchronous communication between data buses. The device transmits data from  
the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR)  
input. The output-enable (OE) input can be used to disable the device so the buses are effectively isolated.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or  
pulldown resistors with the bus-hold circuitry is not recommended. The bus-hold circuitry is part of the input  
circuit and is not disabled by OE or DIR.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
Reel of 2000  
Reel of 2000  
ORDERABLE PART NUMBER  
SN74LVCH245AQDWRQ1  
SN74LVCH245AQPWRQ1  
TOP-SIDE MARKING  
LH245AQ  
LH245AQ  
SOIC – DW  
–40°C to 125°C  
TSSOP – PW  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2003–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
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