5秒后页面跳转
捷配首页

Datasheet > 逻辑 > 总线驱动器/收发器> SN74LVCH32373AZKER
SN74LVCH32373AZKER PDF预览

SN74LVCH32373AZKER

更新时间： 2024-01-01 13:25:06
品牌 Logo 应用领域
德州仪器 - TI 锁存器输出元件
页数 文件大小 规格书
9页 133K
描述
32-Bit Transparent D-Type Latch With 3-State Outputs 96-LFBGA -40 to 85

阅读下载

中文翻译

获取价格

SN74LVCH32373AZKER 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：BGA
包装说明：LFBGA, BGA96,6X16,32针数：96
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：1.11其他特性：BUS HOLD INPUTS ELIMINATE THE NEED FOR EXTERNAL PULLUP/PULLDOWN RESISTORS
控制类型：ENABLE LOW/HIGH计数方向：UNIDIRECTIONAL
系列：LVC/LCX/ZJESD-30 代码：R-PBGA-B96
JESD-609代码：e1长度：13.5 mm
负载电容（CL）：50 pF逻辑集成电路类型：BUS DRIVER
最大I（ol）：0.024 A湿度敏感等级：3
位数：8功能数量：4
端口数量：2端子数量：96
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：LFBGA
封装等效代码：BGA96,6X16,32封装形状：RECTANGULAR
封装形式：GRID ARRAY, LOW PROFILE, FINE PITCH包装方法：TR
峰值回流温度（摄氏度）：260电源：3.3 V
最大电源电流（ICC）：0.04 mAProp。Delay @ Nom-Sup：4.2 ns
传播延迟（tpd）：5.3 ns认证状态：Not Qualified
座面最大高度：1.4 mm子类别：FF/Latches
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：1.65 V
标称供电电压 (Vsup)：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Tin/Silver/Copper (Sn/Ag/Cu)端子形式：BALL
端子节距：0.8 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED翻译：N/A
宽度：5.5 mmBase Number Matches：1

SN74LVCH32373AZKER 数据手册

 浏览型号SN74LVCH32373AZKER的Datasheet PDF文件第2页浏览型号SN74LVCH32373AZKER的Datasheet PDF文件第3页浏览型号SN74LVCH32373AZKER的Datasheet PDF文件第4页浏览型号SN74LVCH32373AZKER的Datasheet PDF文件第5页浏览型号SN74LVCH32373AZKER的Datasheet PDF文件第6页浏览型号SN74LVCH32373AZKER的Datasheet PDF文件第7页 
SN74LVCH32373A  
32-BIT TRANSPARENT D-TYPE LATCH  
WITH 3-STATE OUTPUTS  
SCAS618A – OCTOBER 1998 – REVISED JUNE 1999  
Member of the Texas Instruments  
Widebus Family  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
OLP  
= 3.3 V, T = 25°C  
CC  
A
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
Typical V  
> 2 V at V  
(Output V  
Undershoot)  
OHV  
CC  
OH  
= 3.3 V, T = 25°C  
A
Packaged in Plastic Fine-Pitch Ball Grid  
Array Package  
Power Off Disables Outputs, Permitting  
Live Insertion  
Supports Mixed-Mode Signal Operation  
(5-V Input and Output Voltages With  
3.3-V V  
)
CC  
description  
This 32-bit transparent D-type latch is designed for 1.65-V to 3.6-V V  
operation.  
CC  
The SN74LVCH32373A is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus  
drivers, and working registers. It can be used as four 8-bit latches, two 16-bit latches, or one 32-bit latch. When  
the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs  
are latched at the levels set up at the D inputs.  
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high  
or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive  
thebuslinessignificantly. Thehigh-impedancestateandincreaseddriveprovidethecapabilitytodrivebuslines  
without interface or pullup components.  
OE does not affect internal operations of the latch. Old data can be retained or new data can be entered while  
the outputs are in the high-impedance state.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators  
in a mixed 3.3-V/5-V system environment.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
The SN74LVCH32373A is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
INPUTS  
OUTPUT  
Q
OE  
L
LE  
H
H
L
D
H
L
H
L
L
L
X
X
Q
0
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus trademarks of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...9

中文翻译

下载PDF

SN74LVCH32373AZKER 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC32373AZKER TI

类似代替

 32-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS
SN74LVC32373AGKER TI

类似代替

 32-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

与SN74LVCH32373AZKER相关器件

型号 品牌 获取价格 描述 数据表
SN74LVCH32374A TI

获取价格

 		32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74LVCH32374A_16 TI

获取价格

 		32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP
SN74LVCH32374AGKE TI

获取价格

 		32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74LVCH32374AGKER TI

获取价格

 		32-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs 96-LFBGA -40 to 85
SN74LVCH32374AZKER TI

获取价格

 		32-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs 96-LFBGA -40 to 85
SN74LVCH8T245 TI

获取价格

 		8-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUT
SN74LVCH8T245_10 TI

获取价格

 		8-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUT
SN74LVCH8T245_101 TI

获取价格

 		8-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUT
SN74LVCH8T245_16 TI

获取价格

 		8-BIT Dual-Supply Bus Transceiver
SN74LVCH8T245DBQR TI

获取价格

 		8-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUT

与SN74LVCH32373AZKER相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证