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SN74LVCH32245AGKE PDF预览

SN74LVCH32245AGKE

更新时间： 2024-11-03 22:05:27
品牌 Logo 应用领域
德州仪器 - TI 总线收发器输出元件
页数 文件大小 规格书
9页 135K
描述
32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS

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SN74LVCH32245AGKE 技术参数

生命周期：Obsolete零件包装代码：BGA
包装说明：LFBGA, BGA96(UNSPEC)针数：96
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.27控制类型：COMMON CONTROL
计数方向：BIDIRECTIONAL系列：LVC/LCX/Z
JESD-30 代码：R-PBGA-B96长度：13.5 mm
逻辑集成电路类型：BUS TRANSCEIVER最大I（ol）：0.024 A
位数：8功能数量：4
端口数量：2端子数量：96
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：LFBGA
封装等效代码：BGA96(UNSPEC)封装形状：RECTANGULAR
封装形式：GRID ARRAY, LOW PROFILE, FINE PITCH电源：3.3 V
传播延迟（tpd）：7.1 ns认证状态：Not Qualified
座面最大高度：1.4 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：1.65 V
标称供电电压 (Vsup)：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：BALL端子节距：0.8 mm
端子位置：BOTTOM翻译：N/A
宽度：5.5 mmBase Number Matches：1

SN74LVCH32245AGKE 数据手册

 浏览型号SN74LVCH32245AGKE的Datasheet PDF文件第2页浏览型号SN74LVCH32245AGKE的Datasheet PDF文件第3页浏览型号SN74LVCH32245AGKE的Datasheet PDF文件第4页浏览型号SN74LVCH32245AGKE的Datasheet PDF文件第5页浏览型号SN74LVCH32245AGKE的Datasheet PDF文件第6页浏览型号SN74LVCH32245AGKE的Datasheet PDF文件第7页 
SN74LVCH32245A  
32-BIT BUS TRANSCEIVER  
WITH 3-STATE OUTPUTS  
SCAS616A – OCTOBER 1998 – REVISED JUNE 1999  
Member of the Texas Instruments  
Widebus Family  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
OLP  
= 3.3 V, T = 25°C  
CC  
A
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
Typical V  
> 2 V at V  
(Output V  
Undershoot)  
OHV  
CC  
OH  
= 3.3 V, T = 25°C  
A
Packaged in Plastic Fine-Pitch Ball Grid  
Array Package  
I
Supports Partial-Power-Down-Mode  
off  
Operation  
Supports Mixed-Mode Signal Operation on  
All Ports (5-V Input/Output Voltage With  
3.3-V V  
)
CC  
description  
This 32-bit (dual-octal) noninverting bus transceiver is designed for 1.65-V to 3.6-V V  
operation.  
CC  
The SN74LVCH32245A is designed for asynchronous communication between data buses. The  
control-function implementation minimizes external timing requirements.  
This device can be used as four 8-bit transceivers, two 16-bit transceivers, or one 32-bit transceiver. It allows  
data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at  
the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the  
buses are effectively isolated.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators  
in a mixed 3.3-V/5-V system environment.  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
The SN74LVCH32245A is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
(each 8-bit section)  
INPUTS  
OPERATION  
OE  
L
DIR  
L
B data to A bus  
A data to B bus  
Isolation  
L
H
H
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...9

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