5秒后页面跳转
SN74LVC2G74DCU PDF预览

SN74LVC2G74DCU

更新时间: 2024-01-04 10:09:17
品牌 Logo 应用领域
德州仪器 - TI 光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
8页 109K
描述
LVC/LCX/Z SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8, PLASTIC, TSSOP-8

SN74LVC2G74DCU 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:VSSOP,
针数:8Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.29
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-G8
长度:2.3 mm逻辑集成电路类型:D FLIP-FLOP
位数:1功能数量:1
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:VSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED传播延迟(tpd):14.4 ns
认证状态:Not Qualified座面最大高度:0.9 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:2 mm
最小 fmax:200 MHzBase Number Matches:1

SN74LVC2G74DCU 数据手册

 浏览型号SN74LVC2G74DCU的Datasheet PDF文件第2页浏览型号SN74LVC2G74DCU的Datasheet PDF文件第3页浏览型号SN74LVC2G74DCU的Datasheet PDF文件第4页浏览型号SN74LVC2G74DCU的Datasheet PDF文件第5页浏览型号SN74LVC2G74DCU的Datasheet PDF文件第6页浏览型号SN74LVC2G74DCU的Datasheet PDF文件第7页 
SN74LVC2G74  
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP  
WITH CLEAR AND PRESET  
SCES203H – APRIL 1999 – REVISED SEPTEMBER 2002  
DCT OR DCU PACKAGE  
(TOP VIEW)  
Available in the Texas Instruments  
NanoStar and NanoFree Packages  
Supports 5-V V Operation  
CC  
CLK  
D
V
CC  
1
2
3
4
8
7
6
5
Inputs Accept Voltages to 5.5 V  
PRE  
CLR  
Q
Q
Max t of 5.9 ns at 3.3 V  
pd  
Low Power Consumption, 10 µA Max I  
±24-mA Output Drive at 3.3 V  
GND  
CC  
YEA OR YZA PACKAGE  
(BOTTOM VIEW)  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
OLP  
CC  
= 3.3 V, T = 25°C  
A
Typical V  
(Output V  
Undershoot)  
4 5  
3 6  
2 7  
1 8  
GND  
Q
D
CLK  
Q
CLR  
PRE  
OHV  
OH  
>2 V at V  
= 3.3 V, T = 25°C  
CC  
A
I
Supports Partial-Power-Down Mode  
off  
V
Operation  
CC  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
– 1000-V Charged-Device Model (C101)  
description/ordering information  
This single positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V V  
operation.  
CC  
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the  
die as the package.  
A low level at the preset (PRE) or clear (CLR) input sets or resets the outputs, regardless of the levels of the  
other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time  
requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs  
at a voltage level and is not related directly to the rise time of the clock pulse. Following the hold-time interval,  
data at the D input can be changed without affecting the levels at the outputs.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
NanoStar  
WCSP (DSBGA) – YEA (Lead)  
Tape and reel  
Tape and reel  
SN74LVC2G74YEAR  
SN74LVC2G74YZAR  
_ _ _CP_  
NanoFree  
–40°C to 85°C  
WCSP (DSBGA) – YZA (Lead-free)  
SSOP – DCT  
Tape and reel  
Tape and reel  
SN74LVC2G74DCTR  
SN74LVC2G74DCUR  
C74_ _ _  
C74_  
VSSOP – DCU  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.  
DCU: The actual top-side marking has one additional character that designates the assembly/test site.  
YEA/YZA: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one  
following character to designate the assembly/test site.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoStar and NanoFree are trademarks of Texas Instruments.  
Copyright 2002, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74LVC2G74DCU 替代型号

型号 品牌 替代类型 描述 数据表
NC7SZ74K8X_NL FAIRCHILD

功能相似

D Flip-Flop, LVC/LCX/Z Series, 1-Func, Positive Edge Triggered, 1-Bit, Complementary Outpu
NL17SZ74USG ONSEMI

功能相似

Single D Flip Flop
NC7SZ74K8X FAIRCHILD

功能相似

TinyLogic UHS D-Type Flip-Flop with Preset and Clear

与SN74LVC2G74DCU相关器件

型号 品牌 获取价格 描述 数据表
SN74LVC2G74DCUR TI

获取价格

SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
SN74LVC2G74DCURE4 TI

获取价格

SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
SN74LVC2G74DCURG4 TI

获取价格

SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
SN74LVC2G74DCUT TI

获取价格

SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
SN74LVC2G74DCUTE4 TI

获取价格

SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
SN74LVC2G74DCUTG4 TI

获取价格

SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
SN74LVC2G74-EP TI

获取价格

SINGLE POSITIVE EDGE TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
SN74LVC2G74MDCUTEP TI

获取价格

具有清零和预置端的增强型产品单路正边沿触发式 D 型触发器 | DCU | 8 | -55
SN74LVC2G74-Q1 TI

获取价格

SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
SN74LVC2G74-Q1_15 TI

获取价格

SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET