Datasheet > SN74LVC2G08QDCURQ1

SN74LVC2G08QDCURQ1

更新时间： 2024-11-25 02:50:55

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德州仪器 - TI		栅
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SN74LVC2G08-Q1 Dual 2-Input Positive-AND Gate

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SN74LVC2G08-Q1

www.ti.com

SCES557E – MARCH 2004 – REVISED OCTOBER 2020

SN74LVC2G08-Q1 Dual 2-Input Positive-AND Gate

1 Features

3 Description

•

AEC-Q100 Qualified With the Following Results:

This dual 2-input positive-AND gate is designed for

1.65-V to 5.5-V V_CCoperation.

– Device Temperature Grade 1: –40°C to +125°C

Ambient Operating Temperature Range (DCU

package)

– Device Temperature Grade 3: –40°C to +85°C

Ambient Operating Temperature Range (DCT

package)

The SN74LVC2G08-Q1 performs the Boolean

Y + A • B or Y + A ) B

function

in positive logic.

This device is fully specified for partial-power-down

applications using I _off. The I _offcircuitry disables the

outputs, preventing damaging current backflow

through the device when it is powered down.

•

Supports 5-V V_CCOperation

Inputs Accept Voltages to 5.5 V

Device Information ⁽¹⁾

Low Power Consumption, 10-μA Max I_CC

±24-mA Output Drive at 3.3 V

I_offSupports Partial-Power-Down Mode Operation

Can be Used as a Down Translator to Translate

Input from a Maximum of 5.5 V Down to the V_CC

Level.

PART NUMBER

PACKAGE

BODY SIZE (NOM)

2.95 mm × 2.80 mm

2.30 mm × 2.00 mm

SN74LVC2G08DCT-Q1 SM8 (8)

SN74LVC2G08DCU-Q1 VSSOP (8)

•

Latch-Up Performance Exceeds 100 mA Per JESD

78, Class II

2 Applications

•

Combine Power Good signals for Muliple Power

Rails

Prevent a Signal from Being Passed Until a

Condition is True

Figure 3-1. Logic Diagram (Positive Logic)

Combine Active-Low Error Signals

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

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