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ꢋꢌꢍ ꢄ ꢇ ꢎꢏꢁ ꢐꢌꢑ ꢐꢒ ꢀꢏ ꢑ ꢏꢅꢓ ꢎꢍ ꢁꢋ ꢈ ꢍꢑꢓ
SCES198J − APRIL 1999 − REVISED SEPTEMBER 2003
DCT OR DCU PACKAGE
(TOP VIEW)
D
Available in the Texas Instruments
NanoStar and NanoFree Packages
D
D
D
D
D
D
Supports 5-V V
Operation
CC
1A
1B
2Y
V
CC
1
2
3
4
8
7
6
5
Inputs Accept Voltages to 5.5 V
1Y
2B
2A
Max t of 4.7 ns at 3.3 V
pd
Low Power Consumption, 10-µA Max I
GND
CC
24-mA Output Drive at 3.3 V
Typical V
<0.8 V at V
(Output Ground Bounce)
= 3.3 V, T = 25°C
YEA, YEP, YZA, OR YZP PACKAGE
(BOTTOM VIEW)
OLP
CC
A
D
D
D
D
Typical V
(Output V
Undershoot)
OHV
OH
4 5
3 6
2 7
1 8
GND
2Y
1B
2A
2B
1Y
>2 V at V
= 3.3 V, T = 25°C
CC
A
I
Supports Partial-Power-Down Mode
off
Operation
1A
V
CC
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 1000-V Charged-Device Model (C101)
description/ordering information
This dual 2-input positive-AND gate is designed for 1.65-V to 5.5-V V
operation.
CC
Y + A • B or Y + A ) B
The SN74LVC2G08 performs the Boolean function
in positive logic.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
T
A
PACKAGE
NanoStar − WCSP (DSBGA)
‡
SN74LVC2G08YEAR
0.17-mm Small Bump − YEA
NanoFree − WCSP (DSBGA)
0.17-mm Small Bump − YZA (Pb-free)
SN74LVC2G08YZAR
SN74LVC2G08YEPR
SN74LVC2G08YZPR
Reel of 3000
_ _ _CE_
NanoStar − WCSP (DSBGA)
0.23-mm Large Bump − YEP
−40°C to 85°C
NanoFree − WCSP (DSBGA)
0.23-mm Large Bump − YZP (Pb-free)
SSOP − DCT
Reel of 3000
Reel of 3000
SN74LVC2G08DCTR
SN74LVC2G08DCUR
C08_ _ _
C08_
VSSOP − DCU
Reel of 250
SN74LVC2G08DCUT
†
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code,
and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition
(1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
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Copyright 2003, Texas Instruments Incorporated
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