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SN74LVC2G125 PDF预览

SN74LVC2G125

更新时间: 2024-11-04 23:06:23
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德州仪器 - TI 输出元件
页数 文件大小 规格书
13页 344K
描述
DUAL BUS BUFFER GATE WITH 3 STATE OUTPUTS

SN74LVC2G125 数据手册

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SN74LVC2G125  
DUAL BUS BUFFER GATE  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES204KAPRIL 1999REVISED JUNE 2005  
FEATURES  
DCT OR DCU PACKAGE  
(TOP VIEW)  
Available in the Texas Instruments  
NanoStar™ and NanoFree™ Packages  
1OE  
1A  
2Y  
V
CC  
1
2
3
4
8
7
6
5
Supports 5-V VCC Operation  
2OE  
1Y  
2A  
Inputs Accept Voltages to 5.5 V  
Max tpd of 4.3 ns at 3.3 V  
GND  
Low Power Consumption, 10-µA Max ICC  
±24-mA Output Drive at 3.3 V  
YEA, YEP, YZA, OR YZP PACKAGE  
(BOTTOM VIEW)  
Typical VOLP (Output Ground Bounce)  
<0.8 V at VCC = 3.3 V, TA = 25°C  
4
3
2
1
5
6
7
8
GND  
2Y  
2A  
1Y  
Typical VOHV (Output VOH Undershoot)  
>2 V at VCC = 3.3 V, TA = 25°C  
1A  
1OE  
2OE  
Ioff Supports Partial-Power-Down Mode  
Operation  
V
CC  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
– 1000-V Charged-Device Model (C101)  
DESCRIPTION/ORDERING INFORMATION  
The SN74LVC2G125 is a dual bus buffer gate, designed for 1.65-V to 5.5-V VCC operation. This device features  
dual line drivers with 3-state outputs. The outputs are disabled when the associated output-enable (OE) input is  
high.  
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the  
die as the package.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER TOP-SIDE MARKING(2)  
NanoStar™ – WCSP (DSBGA)  
0.17-mm Small Bump – YEA  
SN74LVC2G125YEAR  
NanoFree™ – WCSP (DSBGA)  
0.17-mm Small Bump – YZA (Pb-free)  
SN74LVC2G125YZAR  
_ _ _CM_  
Reel of 3000  
NanoStar™ – WCSP (DSBGA)  
0.23-mm Large Bump – YEP  
SN74LVC2G125YEPR  
–40°C to 85°C  
NanoFree™ – WCSP (DSBGA)  
0.23-mm Large Bump – YZP (Pb-free)  
SN74LVC2G125YZPR  
SSOP – DCT  
Reel of 3000  
Reel of 3000  
Reel of 250  
SN74LVC2G125DCTR  
SN74LVC2G125DCUR  
SN74LVC2G125DCUT  
C25_ _ _  
C25_  
VSSOP – DCU  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
(2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.  
DCU: The actual top-side marking has one additional character that designates the assembly/test site.  
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one  
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, = Pb-free).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoStar, NanoFree are trademarks of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1999–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

SN74LVC2G125 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC2G125-Q1 TI

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