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SN74AUP1G98DCKRG4 PDF预览

SN74AUP1G98DCKRG4

更新时间: 2024-10-31 11:50:11
品牌 Logo 应用领域
德州仪器 - TI 触发器逻辑集成电路光电二极管
页数 文件大小 规格书
26页 1109K
描述
LOW-POWER CONFIGURABLE MULTIPLE-FUNCTION GATE

SN74AUP1G98DCKRG4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:GREEN, PLASTIC, SC-70, 6 PIN针数:6
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.17Is Samacsys:N
系列:AUP/ULP/VJESD-30 代码:R-PDSO-G6
JESD-609代码:e4长度:2 mm
负载电容(CL):30 pF逻辑集成电路类型:LOGIC CIRCUIT
最大I(ol):0.0017 A湿度敏感等级:1
功能数量:1端子数量:6
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP6,.08
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TR峰值回流温度(摄氏度):260
电源:1.2/3.3 VProp。Delay @ Nom-Sup:26.8 ns
认证状态:Not Qualified施密特触发器:YES
座面最大高度:1.1 mm子类别:Gates
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):0.8 V
标称供电电压 (Vsup):1.2 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:1.25 mm
Base Number Matches:1

SN74AUP1G98DCKRG4 数据手册

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SN74AUP1G98  
www.ti.com  
SCES506H NOVEMBER 2003REVISED MAY 2010  
LOW-POWER CONFIGURABLE MULTIPLE-FUNCTION GATE  
Check for Samples: SN74AUP1G98  
1
FEATURES  
Available in the Texas Instruments NanoStar™  
Package  
Wide Operating VCC Range of 0.8 V to 3.6 V  
Optimized for 3.3-V Operation  
Low Static-Power Consumption  
(ICC = 0.9 mA Max)  
3.6-V I/O Tolerant to Support Mixed-Mode  
Signal Operation  
Low Dynamic-Power Consumption  
(Cpd = 4.6 pF Typ at 3.3 V)  
tpd = 5.3 ns Max at 3.3 V  
Suitable for Point-to-Point Applications  
Low Input Capacitance (Ci = 1.5 pF Typ)  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
Low Noise – Overshoot and Undershoot  
<10% of VCC  
ESD Performance Tested Per JESD 22  
Ioff Supports Partial-Power-Down Mode  
Operation  
2000-V Human-Body Model  
(A114-B, Class II)  
Includes Schmitt-Trigger Inputs  
1000-V Charged-Device Model (C101)  
DBV PACKAGE  
(TOP VIEW)  
DCK PACKAGE  
(TOP VIEW)  
DRL PACKAGE  
(TOP VIEW)  
DRY PACKAGE  
(TOP VIEW)  
DSF PACKAGE  
(TOP VIEW)  
YFP PACKAGE  
(TOP VIEW)  
YZP PACKAGE  
(TOP VIEW)  
A2  
A1  
1
2
6
5
4
A1  
B1  
C1  
A2  
B2  
C2  
1
2
3
6
5
4
1
2
3
6
5
4
B
C
1
2
3
6
5
4
B
GND  
A
C
B
GND  
A
B
GND  
A
C
C
GND B1  
B2  
C2  
VCC  
Y
VCC  
VCC  
Y
VCC  
Y
C1 3  
A
Y
See mechanical drawings for dimensions.  
DESCRIPTION/ORDERING INFORMATION  
The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable  
applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range  
of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal  
integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).  
The SN74AUP1G98 features configurable multiple functions. The output state is determined by eight patterns of  
3-bit input. The user can choose the logic functions MUX, AND, OR, NAND, NOR, inverter, and noninverter. All  
inputs can be connected to VCC or GND.  
The device functions as an independent gate with Schmitt-trigger inputs, which allow for slow input transition and  
better switching-noise immunity at the input.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2003–2010, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
 

SN74AUP1G98DCKRG4 替代型号

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SN74AUP1G98DCKR TI

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