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SN74AUC2G79YZPR PDF预览

SN74AUC2G79YZPR

更新时间： 2024-11-16 03:15:55
品牌 Logo 应用领域
德州仪器 - TI 触发器
页数 文件大小 规格书
12页 275K
描述
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

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中文翻译

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SN74AUC2G79YZPR 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：BGA
包装说明：VFBGA, BGA8,2X4,20针数：8
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：1.45系列：AUC
JESD-30 代码：R-XBGA-B8JESD-609代码：e1
长度：1.9 mm负载电容（CL）：15 pF
逻辑集成电路类型：D FLIP-FLOP最大频率@ Nom-Sup：200000000 Hz
最大I（ol）：0.009 A湿度敏感等级：1
位数：1功能数量：2
端子数量：8最高工作温度：85 °C
最低工作温度：-40 °C输出极性：TRUE
封装主体材料：UNSPECIFIED封装代码：VFBGA
封装等效代码：BGA8,2X4,20封装形状：RECTANGULAR
封装形式：GRID ARRAY, VERY THIN PROFILE, FINE PITCH包装方法：TR
峰值回流温度（摄氏度）：260电源：1.2/2.5 V
最大电源电流（ICC）：0.01 mAProp。Delay @ Nom-Sup：3.9 ns
传播延迟（tpd）：3.9 ns认证状态：Not Qualified
座面最大高度：0.5 mm子类别：FF/Latches
最大供电电压 (Vsup)：2.7 V最小供电电压 (Vsup)：0.8 V
标称供电电压 (Vsup)：1.2 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Tin/Silver/Copper (Sn/Ag/Cu)端子形式：BALL
端子节距：0.5 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED触发器类型：POSITIVE EDGE
宽度：0.9 mm最小 fmax：275 MHz
Base Number Matches：1

SN74AUC2G79YZPR 数据手册

 浏览型号SN74AUC2G79YZPR的Datasheet PDF文件第2页浏览型号SN74AUC2G79YZPR的Datasheet PDF文件第3页浏览型号SN74AUC2G79YZPR的Datasheet PDF文件第4页浏览型号SN74AUC2G79YZPR的Datasheet PDF文件第5页浏览型号SN74AUC2G79YZPR的Datasheet PDF文件第6页浏览型号SN74AUC2G79YZPR的Datasheet PDF文件第7页 
SN74AUC2G79  
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP  
www.ti.com  
SCES536A–DECEMBER 2003–REVISED MARCH 2005  
FEATURES  
DCT OR DCU PACKAGE  
(TOP VIEW)  
•
Available in the Texas Instruments  
NanoStar™ and NanoFree™ Packages  
1CLK  
1D  
2Q  
GND  
V
CC  
1
2
3
4
8
7
6
5
•
Optimized for 1.8-V Operation and Is 3.6-V I/O  
Tolerant to Support Mixed-Mode Signal  
Operation  
1Q  
2D  
2CLK  
•
Ioff Supports Partial-Power-Down Mode  
Operation  
•
•
•
•
•
Sub-1-V Operable  
YEP OR YZP PACKAGE  
(BOTTOM VIEW)  
Max tpd of 1.9 ns at 1.8 V  
Low Power Consumption, 10-µA Max ICC  
±8-mA Output Drive at 1.8 V  
4
3
2
1
5
6
7
8
GND  
2Q  
2CLK  
2D  
1D  
1CLK  
1Q  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
V
CC  
•
ESD Performance Tested Per JESD 22  
– 2000-V Human-Body Model  
(A114-B, Class II)  
– 200-V Machine Model (A115-A)  
– 1000-V Charged-Device Model (C101)  
DESCRIPTION/ORDERING INFORMATION  
This single positive-edge-triggered D-type flip-flop is operational at 0.8-V to 2.7-V VCC, but is designed  
specifically for 1.65-V to 1.95-V VCC operation.  
When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the  
positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the  
rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting  
the levels at the outputs.  
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the  
die as the package.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER TOP-SIDE MARKING(2)  
NanoStar™ – WCSP (DSBGA)  
0.23-mm Large Bump – YEP  
Tape and reel  
Tape and reel  
SN74AUC2G79YEPR  
_ _ _UR_  
NanoFree™ – WCSP (DSBGA)  
0.23-mm Large Bump – YZP (Pb-free)  
SN74AUC2G79YZPR  
–40°C to 85°C  
SSOP – DCT  
Tape and reel  
Tape and reel  
SN74AUC2G79DCTR  
SN74AUC2G79DCUR  
U79_ _ _  
U79_  
VSSOP – DCU  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
(2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.  
DCU: The actual top-side marking has one additional character that designates the assembly/test site.  
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following  
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, = Pb-free).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoStar, NanoFree are trademarks of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2003–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...12

中文翻译

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SN74AUC2G79YZPR 替代型号

型号 品牌 替代类型 描述 数据表
SN74AUC1G74DCUR TI

类似代替

 SINGLE POSITIVE EDGE TRIGGERED D TYPE FLIP FLOP WITH CLEAR AND PRESET
SN74AUC1G74DCTR TI

类似代替

 SINGLE POSITIVE EDGE TRIGGERED D TYPE FLIP FLOP WITH CLEAR AND PRESET
SN74AUP1G74DCUR TI

功能相似

 LOW-POWER SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

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