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SN74AUC32244GKER PDF预览

SN74AUC32244GKER

更新时间： 2024-11-16 04:35:31
品牌 Logo 应用领域
德州仪器 - TI 驱动器输出元件
页数 文件大小 规格书
10页 272K
描述
32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS

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SN74AUC32244GKER 技术参数

生命周期：Lifetime Buy零件包装代码：BGA
包装说明：LFBGA, BGA96,6X16,32针数：96
Reach Compliance Code：not_compliantHTS代码：8542.39.00.01
风险等级：7.5控制类型：ENABLE LOW
计数方向：UNIDIRECTIONAL系列：AUC
JESD-30 代码：R-PBGA-B96JESD-609代码：e0
长度：13.5 mm负载电容（CL）：15 pF
逻辑集成电路类型：BUS DRIVER最大I（ol）：0.009 A
湿度敏感等级：2位数：4
功能数量：8端口数量：2
端子数量：96最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：LFBGA封装等效代码：BGA96,6X16,32
封装形状：RECTANGULAR封装形式：GRID ARRAY, LOW PROFILE, FINE PITCH
包装方法：TR峰值回流温度（摄氏度）：235
电源：1.2/2.5 V最大电源电流（ICC）：0.04 mA
Prop。Delay @ Nom-Sup：2.8 ns传播延迟（tpd）：2.8 ns
认证状态：Not Qualified座面最大高度：1.4 mm
子类别：Bus Driver/Transceivers最大供电电压 (Vsup)：2.7 V
最小供电电压 (Vsup)：0.8 V标称供电电压 (Vsup)：1.2 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：BALL端子节距：0.8 mm
端子位置：BOTTOM处于峰值回流温度下的最长时间：NOT SPECIFIED
翻译：N/A宽度：5.5 mm
Base Number Matches：1

SN74AUC32244GKER 数据手册

 浏览型号SN74AUC32244GKER的Datasheet PDF文件第2页浏览型号SN74AUC32244GKER的Datasheet PDF文件第3页浏览型号SN74AUC32244GKER的Datasheet PDF文件第4页浏览型号SN74AUC32244GKER的Datasheet PDF文件第5页浏览型号SN74AUC32244GKER的Datasheet PDF文件第6页浏览型号SN74AUC32244GKER的Datasheet PDF文件第7页 
SN74AUC32244  
32-BIT BUFFER/DRIVER  
WITH 3-STATE OUTPUTS  
SCES425 – FEBRUARY 2003  
Member of the Texas Instruments  
Widebus+ Family  
Low Power Consumption, 40-µA Max I  
CC  
±8-mA Output Drive at 1.8 V  
Optimized for 1.8-V Operation and is 3.6-V  
I/O Tolerant to Support Mixed-Mode Signal  
Operation  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
I
Supports Partial-Power-Down Mode  
off  
Operation  
Sub 1-V Operable  
– 1000-V Charged-Device Model (C101)  
Max t of 1.8 ns at 1.8 V  
pd  
description/ordering information  
This 32-bit buffer/driver is operational at 0.8-V to 2.7-V V , but is designed specifically for 1.65-V to 1.95-V  
CC  
V
operation.  
CC  
The SN74AUC32244 is designed specifically to improve the performance and density of 3-state memory  
address drivers, clock drivers, and bus-oriented receivers and transmitters.  
Thedevicecanbeusedaseight4-bitbuffers, four8-bitbuffers, two16-bitbuffers, orone32-bitbuffer. Itprovides  
true outputs and symmetrical active-low output-enable (OE) inputs.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
T
A
PACKAGE  
–40°C to 85°C LFBGA – GKE Tape and reel  
SN74AUC32244GKER  
MM244  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus+ is a trademark of Texas Instruments.  
Copyright 2003, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...10

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SN74AUC32244GKER 替代型号

型号 品牌 替代类型 描述 数据表
SN74AUC32244ZKER TI

完全替代

 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74AUC32245GKER TI

类似代替

 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
SN74AUC32245ZKER TI

类似代替

 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS

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