SN74ALS232BDWR

更新时间： 2024-09-26 12:57:51

品牌	Logo	应用领域
德州仪器 - TI		存储内存集成电路光电二极管先进先出芯片时钟
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8页	126K
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替代型号

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SN74ALS232BDWR 数据手册

SN74ALS232B

16 × 4 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY

SCAS251B – FEBRUARY 1989 – REVISED APRIL 1998

DW OR N PACKAGE

Independent Asynchronous Inputs and

Outputs

(TOP VIEW)

16 Words by 4 Bits

Data Rates up to 40 MHz

Fall-Through Time 14 ns Typical

3-State Outputs

FULL

LDCK

GND

UNCK

EMPTY

Package Options Include Plastic

Small-Outline Package (DW), Plastic Chip

Carriers (FN), and Standard Plastic 300-mil

DIPs (N)

RST

description

FN PACKAGE

(TOP VIEW)

This 64-bit memory features high speed and fast

fall-through times. It is organized as 16 words by

4 bits.

A first-in, first-out (FIFO) memory is a storage

device that allows data to be written into and read

from its array at independent data rates. This

FIFO is designed to process data at rates up to

40 MHz in a bit-parallel format, word by word.

2 1 20 19

LDCK

EMPTY

Data is written into memory on a low-to-high

transition at the load-clock (LDCK) input and is

read out on a low-to-high transition at the

unload-clock (UNCK) input. The memory is full

when the number of words clocked in exceeds by

16 the number of words clocked out. When the

memory is full, LDCK signals have no effect on the

data residing in memory. When the memory is

empty, UNCK signals have no effect.

9 10 11 12 13

NC – No internal connection

Status of the FIFO memory is monitored by the FULL and EMPTY output flags. The FULL output is low when

the memory is full and high when it is not full. The EMPTY output is low when the memory is empty and high

when it is not empty.

A low level on the reset (RST) input resets the internal stack-control pointers and also sets EMPTY low and sets

FULL high. The Q outputs are not reset to any specific logic level. The first low-to-high transition on LDCK, after

either a RST pulse or from an empty condition, causes EMPTY to go high and the data to appear on the

Q outputs. It is important to note that the first word does not have to be unloaded. Data outputs are noninverting

with respect to the data inputs and are at high impedance when the output-enable (OE) input is low. OE does

not affect the FULL or EMPTY output flags. Cascading is easily accomplished in the word-width direction but

is not possible in the word-depth direction.

The SN74ALS232B is characterized for operation from 0°C to 70°C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7 8

中文翻译

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SN74ALS232BDWR 替代型号

型号	品牌	替代类型	描述	数据表
CD74HC40105MTE4	TI	完全替代	High-Speed CMOS Logic 4-Bit x 16-Word FIFO Register
CD74HCT40105M	TI	完全替代	High Speed CMOS Logic 4-Bit x 16-Word FIFO Register
SN74ALS232BDW	TI	完全替代	16 】 4 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMOR

与SN74ALS232BDWR相关器件

型号	品牌	获取价格	描述	数据表
SN74ALS232BFN	TI	获取价格	16 】 4 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMOR
SN74ALS232BN	TI	获取价格	16 】 4 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMOR
SN74ALS232N	TI	获取价格	IC,FIFO,16X4,ASYNCHRONOUS,ALS-TTL,DIP,16PIN,PLASTIC
SN74ALS233ADW3	TI	获取价格	IC IC,FIFO,16X5,ASYNCHRONOUS,ALS-TTL,SOP,20PIN,PLASTIC, FIFO
SN74ALS233B	TI	获取价格	16 】 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMOR
SN74ALS233B_16	TI	获取价格	ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY
SN74ALS233BDW	TI	获取价格	16 】 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMOR
SN74ALS233BDWR	TI	获取价格	16 x 5 asynchronous FIFO memory 20-SOIC 0 to 70
SN74ALS233BFN	TI	获取价格	16 】 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMOR
SN74ALS233BFNR	TI	获取价格	暂无描述

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