Datasheet > SN65LVDS302ZXHR

SN65LVDS302ZXHR

更新时间： 2024-09-17 02:50:55

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德州仪器 - TI		/
页数	文件大小	规格书
49页	2695K
描述
SN65LVDS302 Programmable 27-Bit Serial-to-Parallel Receiver

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SN65LVDS302ZXHR 数据手册

SN65LVDS302

www.ti.com

SLLS733E – JUNE 2006 – REVISED OCTOBER 2020

SN65LVDS302 Programmable 27-Bit Serial-to-Parallel Receiver

1 Features

3 Description

•

Serial interface technology

Compatible with FlatLink^™3G such as

SN65LVDS301

The

SN65LVDS302

receiver

de-serializes

FlatLink™3G compliant serial input data to 27 parallel

data outputs. The SN65LVDS302 receiver contains

one shift register to load 30 bits from 1, 2 or 3 serial

inputs and latches the 24 pixel bits and 3 control bits

out to the parallel CMOS outputs after checking the

parity bit. If the parity check confirms correct parity,

the Channel Parity Error (CPE) output remains low. If

a parity error is detected, the CPE output generates a

high pulse while the data output bus disregards the

newly-received pixel. Instead, the last data word is

held on the output bus for another clock cycle.

•

Supports video interfaces up to 24-bit RGB data

and 3 control bits received over 1, 2 or 3 SubLVDS

differential lines

SubLVDS differential voltage levels

Up to 1.755-Gbps Data Throughput

Three operating modes to conserve power

– Active mode QVGA: 17 mW

– Typical shutdown: 0.7 μW

•

– Typical standby mode: 27 μW Typical

Bus-swap function for PCB-layout flexibility

ESD rating > 4 kV (HBM)

Pixel clock range of 4 MHz to 65 MHz

Failsafe on all CMOS inputs

Device Information ⁽¹⁾

•

PART NUMBER

PACKAGE

BODY SIZE (NOM)

SN65LVDS302

nFBGA (80)

5.00 mm × 5.00 mm

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

Packaged in 5-mm × 5-mm nFBGA with 0.5-mm

ball pitch

•

Very low EMI meets SAE J1752/3 'Kh'-spec

2 Applications

•

Wearables (non-medical)

Tablets

Mobile phones

Portable electronics

Gaming

Retail automation & payment

Building automation

LCD

VDS314

VDS302

Application

Processor

with CMOS

Video Interface

LVDS301

LVDS311

Implementation Example

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

Product Folder Links: SN65LVDS302

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与SN65LVDS302ZXHR相关器件

型号	品牌	获取价格	描述	数据表
SN65LVDS303	TI	获取价格	PROGRAMMABLE 27-BIT DISPLAY SERIAL-INTERFACE TRANSMITTER
SN65LVDS303ZQE	TI	获取价格	LINE DRIVER, PBGA80, 5 X 5 MM, PLASTIC, MICRO, BGA-80
SN65LVDS303ZQER	TI	获取价格	PROGRAMMABLE 27-BIT DISPLAY SERIAL-INTERFACE TRANSMITTER
SN65LVDS304	TI	获取价格	PROGRAMMABLE 27-BIT PARALLEL-TO-SERIAL RECEIVER
SN65LVDS304ZQER	TI	获取价格	PROGRAMMABLE 27-BIT PARALLEL-TO-SERIAL RECEIVER
SN65LVDS305	TI	获取价格	PROGRAMMABLE 27-BIT DISPLAY SERIAL INTERFACE TRANSMITTER
SN65LVDS305ZQE	TI	获取价格	PROGRAMMABLE 27-BIT DISPLAY SERIAL INTERFACE TRANSMITTER
SN65LVDS305ZQER	TI	获取价格	PROGRAMMABLE 27-BIT DISPLAY SERIAL INTERFACE TRANSMITTER
SN65LVDS306	TI	获取价格	PROGRAMMABLE 27-BIT SERIAL-TO-PARALLEL RECEIVER
SN65LVDS306ZQER	TI	获取价格	PROGRAMMABLE 27-BIT SERIAL-TO-PARALLEL RECEIVER

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