5秒后页面跳转
捷配首页

Datasheet > 驱动程序和接口 > 线路驱动器或接收器> SN65LVDS305ZQER
SN65LVDS305ZQER PDF预览

SN65LVDS305ZQER

更新时间： 2024-11-09 03:40:07
品牌 Logo 应用领域
德州仪器 - TI 线路驱动器或接收器驱动程序和接口接口集成电路
页数 文件大小 规格书
25页 713K
描述
PROGRAMMABLE 27-BIT DISPLAY SERIAL INTERFACE TRANSMITTER

阅读下载

中文翻译

获取价格

SN65LVDS305ZQER 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：BGA
包装说明：VFBGA, BGA80,9X9,20针数：80
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：7.72
差分输出：YES驱动器位数：1
高电平输入电流最大值：0.00002 A输入特性：STANDARD
接口集成电路类型：LINE DRIVER接口标准：GENERAL PURPOSE
JESD-30 代码：S-PBGA-B80JESD-609代码：e1
长度：5 mm湿度敏感等级：3
功能数量：1端子数量：80
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：DIFFERENTIAL输出极性：COMPLEMENTARY
封装主体材料：PLASTIC/EPOXY封装代码：VFBGA
封装等效代码：BGA80,9X9,20封装形状：SQUARE
封装形式：GRID ARRAY, VERY THIN PROFILE, FINE PITCH峰值回流温度（摄氏度）：260
电源：1.8 V认证状态：Not Qualified
最大接收延迟：接收器位数：2
座面最大高度：1 mm子类别：Line Driver or Receivers
最大压摆率：18.8 mA最大供电电压：1.95 V
最小供电电压：1.65 V标称供电电压：1.8 V
电源电压1-最大：1.95 V电源电压1-分钟：1.65 V
电源电压1-Nom：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Tin/Silver/Copper (Sn/Ag/Cu)端子形式：BALL
端子节距：0.5 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：5 mm
Base Number Matches：1

SN65LVDS305ZQER 数据手册

 浏览型号SN65LVDS305ZQER的Datasheet PDF文件第2页浏览型号SN65LVDS305ZQER的Datasheet PDF文件第3页浏览型号SN65LVDS305ZQER的Datasheet PDF文件第4页浏览型号SN65LVDS305ZQER的Datasheet PDF文件第5页浏览型号SN65LVDS305ZQER的Datasheet PDF文件第6页浏览型号SN65LVDS305ZQER的Datasheet PDF文件第7页 
SN65LVDS305  
www.ti.com  
SLLS744–AUGUST 2006  
PROGRAMMABLE 27-BIT DISPLAY SERIAL INTERFACE TRANSMITTER  
FPC  
cabling  
typically  
interconnects  
the  
FEATURES  
SN65LVDS305 with the display. Compared to  
parallel signaling, the SN65LVDS305 outputs reduce  
the EMI of the interconnect by over 20 dB.  
•
FlatLink™3G Serial-Interface Technology  
•
Compatible With FlatLink3G Receivers Such  
as SN65LVDS306  
The SN65LVDS305 supports three power modes  
(shutdown, standby and active) to conserve power.  
When transmitting, the PLL locks to the incoming  
pixel clock, PCLK, and generates an internal  
high-speed clock at the line rate of the data lines.  
The parallel data are latched on the rising or falling  
edge of PCLK, as selected by the external control  
signal CPOL. The serialized data is presented on the  
serial output, D, together with a recreated PCLK  
generated from the internal high-speed clock that is  
output on CLK. If PCLK stops, the device enters a  
standby mode to conserve power.  
•
•
Input Supports 24-bit RGB Video Mode  
Interface  
24-Bit RGB Data, 3 Control Bits, 1 Parity Bit,  
and 2 Reserved Bits Transmitted Over One  
Differential Line  
•
•
•
SubLVDS Differential Voltage Levels  
Effective Data Throughput up to 405 Mbps  
Three Operating Modes to Conserve Power  
–
–
–
Active-Mode QVGA 17.4 mW (Typical)  
Shutdown Mode ≈ 0.5 µA (Typical)  
Standby Mode ≈ 0.5 µA (Typical)  
The parallel (CMOS) input bus offers a bus-swap  
feature. The SWAP terminal configures the input  
order of the pixel data to be either R[7:0]. G[7:0],  
B[7:0], VS, HS, DE or B[0:7]. G[0:7], R[0:7], VS, HS,  
DE. This gives a PCB designer the flexibility to better  
match the bus to the host controller pinout or to put  
the transmitter device on the top side or the bottom  
side of the PCB.  
•
Bus Swap for Increased PCB Layout  
Flexibility  
•
•
•
1.8-V Supply Voltage  
ESD Rating > 2 kV (HBM)  
Typical Application: Host-Controller to  
Display-Module Interface  
•
•
•
Pixel Clock Range of 4 MHz–15 MHz  
Failsafe on all CMOS Inputs  
Packaging: 80-Terminal 5-mm × 5-mm µBGA®  
LCD  
Driver  
Flatlinkä3G  
DESCRIPTION  
The SN65LVDS305 serializer device converts 27  
parallel data inputs to one sub-low-voltage  
differential signaling (SubLVDS) serial output. It  
loads a shift register with 24 pixel bits and 3 control  
bits from the parallel CMOS input interface. In  
addition to the 27 data bits, the device adds a parity  
bit and two reserved bits into a 30-bit data word.  
Each word is latched into the device by the pixel  
clock (PCLK). The parity bit (odd parity) allows a  
receiver to detect single bit errors. The serial shift  
register is uploaded at 30 times the pixel-clock data  
rate. A copy of the pixel clock is output on a separate  
differential output.  
LVDS306  
CLK DATA  
LVDS305  
Application  
Processor  
with  
1
4
7
3
6
9
#
2
5
8
0
RGB  
Video  
Interface  
*
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
FlatLink is a trademark of Texas Instruments.  
µBGA is a registered trademark of Tessera, Inc..  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2006, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...25

中文翻译

下载PDF

SN65LVDS305ZQER 替代型号

型号 品牌 替代类型 描述 数据表
SN65LVDS301ZQER TI

类似代替

 PROGRAMMABLE 27-BIT DISPLAY SERIAL INTERFACE TRANSMITTER
SN65LVDS301ZQE TI

类似代替

 PROGRAMMABLE 27-BIT DISPLAY SERIAL INTERFACE TRANSMITTER
SN65LVDS306ZQER TI

功能相似

 PROGRAMMABLE 27-BIT SERIAL-TO-PARALLEL RECEIVER

与SN65LVDS305ZQER相关器件

型号 品牌 获取价格 描述 数据表
SN65LVDS306 TI

获取价格

 		PROGRAMMABLE 27-BIT SERIAL-TO-PARALLEL RECEIVER
SN65LVDS306ZQER TI

获取价格

 		PROGRAMMABLE 27-BIT SERIAL-TO-PARALLEL RECEIVER
SN65LVDS307 TI

获取价格

 		PROGRAMMABLE 27-BIT PARALLEL-TO-SERIAL TRANSMITTER
SN65LVDS307ZQCR TI

获取价格

 		PROGRAMMABLE 27-BIT PARALLEL-TO-SERIAL TRANSMITTER
SN65LVDS307ZQCT TI

获取价格

 		PROGRAMMABLE 27-BIT PARALLEL-TO-SERIAL TRANSMITTER
SN65LVDS308 TI

获取价格

 		PROGRAMMABLE 27-BIT PARALLEL-TO-SERIAL RECEIVER
SN65LVDS308ZQCR TI

获取价格

 		PROGRAMMABLE 27-BIT PARALLEL-TO-SERIAL RECEIVER
SN65LVDS308ZQCT TI

获取价格

 		PROGRAMMABLE 27-BIT PARALLEL-TO-SERIAL RECEIVER
SN65LVDS31 TI

获取价格

 		HIGH-SPEED DIFFERENTIAL LINE DRIVERS
SN65LVDS31_09 TI

获取价格

 		HIGH-SPEED DIFFERENTIAL LINE DRIVERS

与SN65LVDS305ZQER相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证