Datasheet > SN54AC573_16

SN54AC573_16

更新时间： 2024-11-26 02:58:23

品牌	Logo	应用领域
德州仪器 - TI		输出元件
页数	文件大小	规格书
6页	124K
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OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS

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SN54AC573_16 数据手册

SN54AC573, SN74AC573

OCTAL D-TYPE TRANSPARENT LATCHES

WITH 3-STATE OUTPUTS

SCAS542B - OCTOBER 1995 – REVISED NOVEMBER 1996

SN54AC573 . . . J OR W PACKAGE

SN74AC573 . . . DB, DW, N, OR PW PACKAGE

(TOP VIEW)

3-State Outputs Drive Bus Lines Directly

EPIC (Enhanced-Performance Implanted

CMOS) 1-µm Process

Package Options Include Plastic

Small-Outline (DW) Shrink Small-Outline

(DB), and Thin Shrink Small-Outline (PW)

Packages, Ceramic Chip Carriers (FK) and

Flatpacks (W), and Standard Plastic (N) and

Ceramic (J) DIPs

description

These 8-bit latches feature 3-state outputs

designed specifically for driving highly capacitive

or relatively low-impedance loads. The devices

are particularly suitable for implementing buffer

registers, I/O ports, bidirectional bus drivers, and

working registers.

GND 10

11 LE

SN54AC573 . . . FK PACKAGE

(TOP VIEW)

The eight latches are D-type transparent latches.

When the latch-enable (LE) input is high, the Q

outputs follow the data (D) inputs. When LE is

taken low, the Q outputs are latched at the logic

levels set up at the D Inputs.

20 19

A buffered output-enable (OE) input can be used

to place the eight outputs in either a normal logic

state (high or low logic levels) or the high-imped-

ance state. In the high-impedance state, the

outputs neither load nor drive the bus lines

significantly. The high-impedance state and

increased drive provide the capability to drive bus

lines in a bus-organized system without need for

interface or pullup components.

9 10 11 12 13

OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered

while the outputs are in the high-impedance state.

The SN54AC573 is characterized for operation over the full military temperature range of –55 C to 125 C.

The SN74AC573 is characterized for operation from –40 C to 85 C.

FUNCTION TABLE

(each latch)

INPUTS

OUTPUT

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC is a trademark of Texas Instruments Incorporated.

UNLESS OTHERWISE NOTED this document contains PRODUCTION

DATA information current as of publication date. Products conform to

specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all

parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6

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与SN54AC573_16相关器件

型号	品牌	获取价格	描述	数据表
SN54AC573FK	TI	获取价格	OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SN54AC573J	TI	获取价格	OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SN54AC573W	TI	获取价格	OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SN54AC574	TI	获取价格	OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54AC574_16	TI	获取价格	OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54AC574FK	TI	获取价格	OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54AC574J	TI	获取价格	OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54AC574W	TI	获取价格	OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54AC74	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN54AC74FK	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

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