SN54AC574J

更新时间： 2024-11-24 22:59:11

品牌	Logo	应用领域
德州仪器 - TI		触发器输出元件
页数	文件大小	规格书
6页	101K
描述
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

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SN54AC574J 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	DIP	包装说明：	DIP, DIP20,.3
针数：	20	Reach Compliance Code：	not_compliant
ECCN代码：	3A001.A.2.C	HTS代码：	8542.39.00.01
风险等级：	5.76	其他特性：	BROADSIDE VERSION OF 374
系列：	AC	JESD-30 代码：	R-GDIP-T20
长度：	24.195 mm	负载电容（CL）：	50 pF
逻辑集成电路类型：	BUS DRIVER	最大频率@ Nom-Sup：	55000000 Hz
最大I（ol）：	0.012 A	位数：	8
功能数量：	1	端口数量：	2
端子数量：	20	最高工作温度：	125 °C
最低工作温度：	-55 °C	输出特性：	3-STATE
输出极性：	TRUE	封装主体材料：	CERAMIC, GLASS-SEALED
封装代码：	DIP	封装等效代码：	DIP20,.3
封装形状：	RECTANGULAR	封装形式：	IN-LINE
峰值回流温度（摄氏度）：	NOT SPECIFIED	电源：	3.3/5 V
传播延迟（tpd）：	10.5 ns	认证状态：	Not Qualified
座面最大高度：	5.08 mm	子类别：	FF/Latches
最大供电电压 (Vsup)：	6 V	最小供电电压 (Vsup)：	2 V
标称供电电压 (Vsup)：	5 V	表面贴装：	NO
技术：	CMOS	温度等级：	MILITARY
端子形式：	THROUGH-HOLE	端子节距：	2.54 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
触发器类型：	POSITIVE EDGE	宽度：	7.62 mm
Base Number Matches：	1

SN54AC574J 数据手册

SN54AC574, SN74AC574

OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS

WITH 3-STATE OUTPUTS

SCAS541B – OCTOBER 1995 – REVISED JUNE 1996

SN54AC574 . . . J OR W PACKAGE

SN74AC574 . . . DB, DW, N, OR PW PACKAGE

(TOP VIEW)

3-State Outputs Drive Bus Lines Directly

EPIC (Enhanced-Performance Implanted

CMOS) 1-µm Process

Package Options Include Plastic

Small-Outline (DW) Shrink Small-Outline

(DB), and Thin Shrink Small-Outline (PW)

Packages, Ceramic Chip Carriers (FK) and

Flatpacks (W), and Standard Plastic (N) and

Ceramic (J) DIP Packages

CLK

description

These 8-bit flip-flops feature 3-state outputs

designed specifically for driving highly capacitive

or relatively low-impedance loads. The devices

are particularly suitable for implementing buffer

registers, I/O ports, bidirectional bus drivers, and

working registers.

GND

SN54AC574 . . . FK PACKAGE

(TOP VIEW)

The eight flip-flops of the ′AC574 are D-type

edge-triggered flip-flops. On the positive transi-

tion of the clock (CLK) input, the Q outputs are set

to the logic levels set up at the data (D) inputs.

20 19

A buffered output-enable (OE) input can be used

to place the eight outputs in either a normal logic

state (high or low logic levels) or the high-

impedance state. In the high-impedance state,

the outputs neither load nor drive the bus lines

significantly. The high-impedance state and the

increased drive provide the capability to drive bus

lines in a bus-organized system without need for

interface or pullup components.

9 10 11 12 13

OE does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while

the outputs are in the high-impedance state.

The SN54AC574 is characterized for operation over the full military temperature range of –55°C to 125°C. The

SN74AC574 is characterized for operation from –40°C to 85°C.

FUNCTION TABLE

(each flip-flop)

INPUTS

OUTPUT

CLK

↑

H or L

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6

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与SN54AC574J相关器件

型号	品牌	获取价格	描述	数据表
SN54AC574W	TI	获取价格	OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54AC74	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN54AC74FK	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN54AC74J	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN54AC74-SP	TI	获取价格	具有清零和预置端的双路正边沿触发式 D 型触发器
SN54AC74W	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN54AC86	TI	获取价格	QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES
SN54AC86_06	TI	获取价格	QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES
SN54AC86_15	TI	获取价格	QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES
SN54AC86FK	TI	获取价格	QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

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