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SN54AC574W PDF预览

SN54AC574W

更新时间: 2024-09-15 22:59:11
品牌 Logo 应用领域
德州仪器 - TI 触发器输出元件
页数 文件大小 规格书
6页 101K
描述
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

SN54AC574W 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DFP包装说明:DFP, FL20,.3
针数:20Reach Compliance Code:not_compliant
ECCN代码:3A001.A.2.CHTS代码:8542.39.00.01
风险等级:5.88其他特性:BROADSIDE VERSION OF 374
系列:ACJESD-30 代码:R-GDFP-F20
长度:13.09 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大频率@ Nom-Sup:55000000 Hz
最大I(ol):0.012 A位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DFP封装等效代码:FL20,.3
封装形状:RECTANGULAR封装形式:FLATPACK
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3/5 V
传播延迟(tpd):10.5 ns认证状态:Not Qualified
座面最大高度:2.54 mm子类别:FF/Latches
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子形式:FLAT端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:6.92 mm

SN54AC574W 数据手册

 浏览型号SN54AC574W的Datasheet PDF文件第2页浏览型号SN54AC574W的Datasheet PDF文件第3页浏览型号SN54AC574W的Datasheet PDF文件第4页浏览型号SN54AC574W的Datasheet PDF文件第5页浏览型号SN54AC574W的Datasheet PDF文件第6页 
SN54AC574, SN74AC574  
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS  
WITH 3-STATE OUTPUTS  
SCAS541B – OCTOBER 1995 – REVISED JUNE 1996  
SN54AC574 . . . J OR W PACKAGE  
SN74AC574 . . . DB, DW, N, OR PW PACKAGE  
(TOP VIEW)  
3-State Outputs Drive Bus Lines Directly  
EPIC (Enhanced-Performance Implanted  
CMOS) 1-µm Process  
Package Options Include Plastic  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
V
CC  
Small-Outline (DW) Shrink Small-Outline  
(DB), and Thin Shrink Small-Outline (PW)  
Packages, Ceramic Chip Carriers (FK) and  
Flatpacks (W), and Standard Plastic (N) and  
Ceramic (J) DIP Packages  
1Q  
2Q  
3Q  
4Q  
5Q  
6Q  
7Q  
8Q  
CLK  
description  
These 8-bit flip-flops feature 3-state outputs  
designed specifically for driving highly capacitive  
or relatively low-impedance loads. The devices  
are particularly suitable for implementing buffer  
registers, I/O ports, bidirectional bus drivers, and  
working registers.  
GND  
SN54AC574 . . . FK PACKAGE  
(TOP VIEW)  
The eight flip-flops of the AC574 are D-type  
edge-triggered flip-flops. On the positive transi-  
tion of the clock (CLK) input, the Q outputs are set  
to the logic levels set up at the data (D) inputs.  
3
2
1
20 19  
18  
4
5
6
7
8
3D  
4D  
5D  
6D  
7D  
2Q  
3Q  
4Q  
5Q  
6Q  
17  
16  
15  
14  
A buffered output-enable (OE) input can be used  
to place the eight outputs in either a normal logic  
state (high or low logic levels) or the high-  
impedance state. In the high-impedance state,  
the outputs neither load nor drive the bus lines  
significantly. The high-impedance state and the  
increased drive provide the capability to drive bus  
lines in a bus-organized system without need for  
interface or pullup components.  
9 10 11 12 13  
OE does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while  
the outputs are in the high-impedance state.  
The SN54AC574 is characterized for operation over the full military temperature range of 55°C to 125°C. The  
SN74AC574 is characterized for operation from 40°C to 85°C.  
FUNCTION TABLE  
(each flip-flop)  
INPUTS  
OUTPUT  
Q
OE  
L
CLK  
D
H
L
H
L
L
L
H or L  
X
X
X
Q
0
H
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1996, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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