5秒后页面跳转
SN54ACT00W PDF预览

SN54ACT00W

更新时间: 2024-11-17 22:59:11
品牌 Logo 应用领域
德州仪器 - TI 输入元件
页数 文件大小 规格书
5页 69K
描述
QUADRUPLE 2-INPUT POSITIVE-NAND GATES

SN54ACT00W 技术参数

生命周期:Obsolete零件包装代码:DFP
包装说明:DFP,针数:14
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.2系列:ACT
JESD-30 代码:R-GDFP-F14长度:9.21 mm
负载电容(CL):50 pF逻辑集成电路类型:NAND GATE
功能数量:4输入次数:2
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DFP封装形状:RECTANGULAR
封装形式:FLATPACK传播延迟(tpd):9.5 ns
认证状态:Not Qualified座面最大高度:2.03 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子形式:FLAT端子节距:1.27 mm
端子位置:DUAL宽度:6.29 mm
Base Number Matches:1

SN54ACT00W 数据手册

 浏览型号SN54ACT00W的Datasheet PDF文件第2页浏览型号SN54ACT00W的Datasheet PDF文件第3页浏览型号SN54ACT00W的Datasheet PDF文件第4页浏览型号SN54ACT00W的Datasheet PDF文件第5页 
SN54ACT00, SN74ACT00  
QUADRUPLE 2-INPUT POSITIVE-NAND GATES  
SCAS523B – AUGUST 1995 – REVISED AUGUST 1999  
SN54ACT00 . . . J OR W PACKAGE  
SN74ACT00 . . . D, DB, N, OR PW PACKAGE  
(TOP VIEW)  
Inputs Are TTL-Voltage Compatible  
EPIC (Enhanced-Performance Implanted  
CMOS) 1-µm Process  
Package Options Include Plastic  
1A  
1B  
1Y  
2A  
2B  
V
CC  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
Small-Outline (D), Shrink Small-Outline  
(DB), Thin Shrink Small-Outline (PW), DIP  
(N) Packages, Ceramic Chip Carriers (FK),  
Flat (W), and DIP (J) Packages  
4B  
4A  
4Y  
3B  
3A  
3Y  
2Y  
GND  
description  
8
The ‘ACT00 devices contain four independent 2-input  
NAND gates. Each gate performs the Boolean  
function of Y = A B or Y = A + B in positive logic.  
SN54ACT00 . . . FK PACKAGE  
(TOP VIEW)  
The SN54ACT00 is characterized for operation over  
the full military temperature range of 55°C to 125°C.  
The SN74ACT00 is characterized for operation from  
40°C to 85°C.  
3
2
1
20 19  
18  
1Y  
NC  
2A  
4A  
NC  
4Y  
NC  
3B  
4
5
6
7
8
17  
16  
15  
14  
FUNCTION TABLE  
(each gate)  
NC  
2B  
INPUTS  
OUTPUT  
Y
9 10 11 12 13  
A
B
H
X
L
H
L
L
H
H
X
NC – No internal connection  
logic symbol  
logic diagram, each gate (positive logic)  
1
1A  
2
A
Y
B
&
3
6
1Y  
2Y  
3Y  
4Y  
1B  
4
2A  
5
2B  
9
3A  
10  
3B  
12  
4A  
13  
4B  
8
11  
This symbol is in accordance with ANSI/IEEE Std 91-1984 and  
IEC Publication 617-12.  
Pin numbers shown are for the D, DB, J, N, PW, and W packages.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

与SN54ACT00W相关器件

型号 品牌 获取价格 描述 数据表
SN54ACT04 TI

获取价格

HEX INVERTERS
SN54ACT04_09 TI

获取价格

HEX INVERTERS
SN54ACT04_10 TI

获取价格

HEX INVERTERS
SN54ACT04_15 TI

获取价格

HEX INVERTERS
SN54ACT04FK TI

获取价格

HEX INVERTERS
SN54ACT04J TI

获取价格

HEX INVERTERS
SN54ACT04-SP TI

获取价格

HEX INVERTERS
SN54ACT04W TI

获取价格

HEX INVERTERS
SN54ACT08 TI

获取价格

QUADRUPLE 2-INPUT POSITIVE-AND GATES
SN54ACT08_03 TI

获取价格

QUADROPLE 2-INPUT POSITIVE - AND GATES