SN54AC573FK

更新时间： 2024-11-24 22:59:11

品牌	Logo	应用领域
德州仪器 - TI		总线驱动器总线收发器锁存器逻辑集成电路输出元件
页数	文件大小	规格书
6页	124K
描述
OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS

阅读下载

中文翻译

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

SN54AC573FK 技术参数

生命周期：	Obsolete	零件包装代码：	QFN
包装说明：	CERAMIC, CC-20	针数：	20
Reach Compliance Code：	unknown	风险等级：	5.84
Is Samacsys：	N	其他特性：	BROADSIDE VERSION OF 373
系列：	AC	JESD-30 代码：	S-CQCC-N20
长度：	8.89 mm	负载电容（CL）：	50 pF
逻辑集成电路类型：	BUS DRIVER	最大I（ol）：	0.012 A
位数：	8	功能数量：	1
端口数量：	2	端子数量：	20
最高工作温度：	125 °C	最低工作温度：	-55 °C
输出特性：	3-STATE	输出极性：	TRUE
封装主体材料：	CERAMIC, METAL-SEALED COFIRED	封装代码：	QCCN
封装等效代码：	LCC20,.35SQ	封装形状：	SQUARE
封装形式：	CHIP CARRIER	电源：	3.3/5 V
Prop。Delay @ Nom-Sup：	16.5 ns	传播延迟（tpd）：	16.5 ns
认证状态：	Not Qualified	座面最大高度：	2.03 mm
子类别：	FF/Latches	最大供电电压 (Vsup)：	6 V
最小供电电压 (Vsup)：	2 V	标称供电电压 (Vsup)：	3.3 V
表面贴装：	YES	技术：	CMOS
温度等级：	MILITARY	端子形式：	NO LEAD
端子节距：	1.27 mm	端子位置：	QUAD
宽度：	8.89 mm	Base Number Matches：	1

SN54AC573FK 数据手册

SN54AC573, SN74AC573

OCTAL D-TYPE TRANSPARENT LATCHES

WITH 3-STATE OUTPUTS

SCAS542B - OCTOBER 1995 – REVISED NOVEMBER 1996

SN54AC573 . . . J OR W PACKAGE

SN74AC573 . . . DB, DW, N, OR PW PACKAGE

(TOP VIEW)

3-State Outputs Drive Bus Lines Directly

EPIC (Enhanced-Performance Implanted

CMOS) 1-µm Process

Package Options Include Plastic

Small-Outline (DW) Shrink Small-Outline

(DB), and Thin Shrink Small-Outline (PW)

Packages, Ceramic Chip Carriers (FK) and

Flatpacks (W), and Standard Plastic (N) and

Ceramic (J) DIPs

description

These 8-bit latches feature 3-state outputs

designed specifically for driving highly capacitive

or relatively low-impedance loads. The devices

are particularly suitable for implementing buffer

registers, I/O ports, bidirectional bus drivers, and

working registers.

GND 10

11 LE

SN54AC573 . . . FK PACKAGE

(TOP VIEW)

The eight latches are D-type transparent latches.

When the latch-enable (LE) input is high, the Q

outputs follow the data (D) inputs. When LE is

taken low, the Q outputs are latched at the logic

levels set up at the D Inputs.

20 19

A buffered output-enable (OE) input can be used

to place the eight outputs in either a normal logic

state (high or low logic levels) or the high-imped-

ance state. In the high-impedance state, the

outputs neither load nor drive the bus lines

significantly. The high-impedance state and

increased drive provide the capability to drive bus

lines in a bus-organized system without need for

interface or pullup components.

9 10 11 12 13

OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered

while the outputs are in the high-impedance state.

The SN54AC573 is characterized for operation over the full military temperature range of –55 C to 125 C.

The SN74AC573 is characterized for operation from –40 C to 85 C.

FUNCTION TABLE

(each latch)

INPUTS

OUTPUT

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC is a trademark of Texas Instruments Incorporated.

UNLESS OTHERWISE NOTED this document contains PRODUCTION

DATA information current as of publication date. Products conform to

specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all

parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6

中文翻译

下载PDF

与SN54AC573FK相关器件

型号	品牌	获取价格	描述	数据表
SN54AC573J	TI	获取价格	OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SN54AC573W	TI	获取价格	OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SN54AC574	TI	获取价格	OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54AC574_16	TI	获取价格	OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54AC574FK	TI	获取价格	OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54AC574J	TI	获取价格	OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54AC574W	TI	获取价格	OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54AC74	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN54AC74FK	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN54AC74J	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

与SN54AC573FK相关文章

解析光耦仿真器：升级光耦合器技术的必要性
2024-11-18

40
英伟达新一代Blackwell GPU过热问题致交付延迟
2024-11-18

32
国产厂商思特威CMOS图像传感器芯片单月出货超1亿颗，技术创新引领行业发展
2024-11-14

60
台积电5nm和3nm产能利用率达100%，半导体行业景气度持续攀升
2024-11-14

56

产品中心

服务支持

精选活动

关于我们

帮助中心

SN54AC573FK

SN54AC573FK 技术参数

SN54AC573FK 数据手册

与SN54AC573FK相关器件

与SN54AC573FK相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

SN54AC573FK

SN54AC573FK 技术参数

SN54AC573FK 数据手册

与SN54AC573FK相关器件

与SN54AC573FK相关文章

您还可以找

您在本页遇到什么问题？