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SI4532ADY PDF预览

SI4532ADY

更新时间: 2024-01-22 23:25:34
品牌 Logo 应用领域
威世 - VISHAY /
页数 文件大小 规格书
4页 404K
描述
N- and P-Channel 30-V (D-S) MOSFET

SI4532ADY 数据手册

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SPICE Device Model Si4532ADY  
Vishay Siliconix  
N- and P-Channel 30-V (D-S) MOSFET  
CHARACTERISTICS  
· N- and P-Channel Vertical DMOS  
· Macro Model (Subcircuit Model)  
· Level 3 MOS  
· Apply for both Linear and Switching Application  
· Accurate over the - 55 to 125°C Temperature Range  
· Model the Gate Charge, Transient, and Diode Reverse Recovery  
Characteristics  
DESCRIPTION  
The attached spice model describes the typical electrical  
A novel gate-to-drain feedback capacitance network is used to model  
the gate charge characteristics while avoiding convergence difficulties  
of the switched Cgd model. All model parameter values are optimized  
to provide a best fit to the measured electrical data and are not  
intended as an exact physical interpretation of the device.  
characteristics of the n- and p-channel vertical DMOS.  
The  
subcircuit model is extracted and optimized over the  
- 55 to 125°C temperature ranges under the pulsed 0 to 10V gate  
drive. The saturated output impedance is best fit at the gate bias  
near the threshold voltage.  
SUBCIRCUIT MODEL SCHEMATIC  
This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to the appropriate  
data sheet of the same number for guaranteed specification limits.  
Document Number: 70551  
16-May-04  
www.vishay.com  
1

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