Datasheet > PI74ALVCH32373

PI74ALVCH32373

更新时间： 2024-10-26 23:27:39

品牌	Logo	应用领域
其他 - ETC		锁存器
页数	文件大小	规格书
7页	478K
描述
Logic \| 32-Bit Transparent D-Type Latch with 3-State Outputs

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PI74ALVCH32373 数据手册

PI74ALVCH32373

32-Bit Transparent D-Type Latch

with 3-State Outputs

Product Features

ProductDescription

Pericom Semiconductors PI74ALVCH series of logic circuits are

produced using the Companys advanced 0.5 micron CMOS

technology, achieving industry leading speed.

• PI74ALVCH32373 is designed for low voltage operation

• V = 2.3V to 3.6V

• Typical V

(Output Ground Bounce)

OLP

This32-bittransparentD-typelatchisdesignedfor2.3Vto3.6VV

operation.

< 0.8V at V = 3.3V, T = 25°C

• Typical V

(Output V Undershoot)

OHV

The PI74ALVCH32373 is particularly suitable for implementing

buffer registers, I/O ports, bidirectional bus drivers, and working

registers. This device can be used as four 8-bit latches or two 16-

bit latches or one 32-Bit latch. When the Latch Enable (LE) input

is HIGH, the Q outputs follow the (D) inputs. When LE is taken

LOW, the Q outputs are latched at the levels set up at the D inputs.

> 2.0V at V = 3.3V, T = 25°C

• Bus Hold retains last active bus state during 3-State,

eliminating the need for external pullup resistors

• Industrial operation at 40°C to +85°C

• Packages available:

96-ball, 13.5mm x 5.5mm x 1.4mm low profile fine

pitch ball grid array, LFBGA (NB)

A buffered Output Enable (OE) input can be used to place the

eight outputs in either a normal logic state (high or low logic

levels) or a high-impedance state in which the outputs neither

loadnordrivethebuslinessignificantly.Thehigh-impedancestate

and the increased drive provide the capability to drive bus lines

without need for interface or pullup components. OE does not

affect internal operations of the latch. Old data can be retained

or new data can be entered while the outputs are in the high

impedance state.

Product Pin Description

Pin Name

Description

Output Enable Input (Active LOW)

Latch Enable (Active HIGH)

Data Inputs

3-State Outputs

Ground

To ensure the high impedance state during power up or power

GND

down, OE should be tied to V through a pullup resistor; the

minimumvalue of the resistor is determined by the current-sinking

capability of the driver.

Power

Truth Table⁽¹⁾

Active bus-hold circuitry is provided to hold unused or floating

data inputs at a valid logic level.

Inputs

Outputs

Notes:

1. H =HighSignalLevel

L =LowSignalLevel

X =Irrelevant

Z = High Impedance

PS8438

10/14/99

12 3 4 5 6 7

中文翻译

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与PI74ALVCH32373相关器件

型号	品牌	获取价格	描述	数据表
PI74ALVCH32373NB	ETC	获取价格	8-Bit D-Type Latch
PI74ALVCH32374	ETC	获取价格	Logic \| 32-Bit Edge Triggered D-Type Flip-Flop with 3-State Outputs
PI74ALVCH32374NB	ETC	获取价格	FLIP-FLOP\|32-BIT\|D TYPE\|AVC/ALVC-CMOS\|BGA\|96PIN\|PLASTIC
PI74ALVCH32501	ETC	获取价格	Logic \| 18-Bit Universal Transceiver
PI74ALVCH32501NB	ETC	获取价格	18-Bit Bus Transceiver
PI74ALVCHR162245	PERICOM	获取价格	3.3V 16-Bit Bidirectional Transceiver with 3-State Output
PI74ALVCHR162245A	ETC	获取价格	Dual 8-bit Bus Transceiver
PI74ALVCHR162245AEX	PERICOM	获取价格	Bus Transceiver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, 0.240 INCH,
PI74ALVCHR162245V	ETC	获取价格	Dual 8-bit Bus Transceiver
PI74ALVCHR162245VE	PERICOM	获取价格	Bus Transceiver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, 0.300 INCH,

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