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PI74ALVCHR162524AX

更新时间： 2024-10-27 15:47:55
品牌 Logo 应用领域
百利通 - PERICOM 光电二极管逻辑集成电路
页数 文件大小 规格书
7页 416K
描述
Registered Bus Transceiver, ALVC/VCX/A Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, 0.240 INCH, PLASTIC, TSSOP-56

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PI74ALVCHR162524AX 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：TSSOP包装说明：TSSOP,
针数：56Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.92系列：ALVC/VCX/A
JESD-30 代码：R-PDSO-G56长度：14 mm
逻辑集成电路类型：REGISTERED BUS TRANSCEIVER位数：18
功能数量：1端口数量：2
端子数量：56最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE WITH SERIES RESISTOR
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：NOT SPECIFIED
传播延迟（tpd）：6.5 ns认证状态：Not Qualified
座面最大高度：1.2 mm最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：2.3 V标称供电电压 (Vsup)：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：6.1 mm
Base Number Matches：1

PI74ALVCHR162524AX 数据手册

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PI74ALVCHR162524  
18-Bit Registered Bus Transceiver  
with 3-State Outputs  
ProductDescription  
Product Features  
Pericom Semiconductor’s PI74ALVCH series of logic circuits are  
produced using the Company’s advanced 0.5 micron CMOS  
technology, achieving industry leading speed.  
• PI74ALVCHR162524 is designed for low voltage operation  
• V = 2.3V to 3.6V  
CC  
• A & B parts have equivalent 26 Ohm series resistors  
ThePI74ALVCHR162524data flowineachdirectioniscontrolledby  
output-enable (OEAB and OEBA) and clock-enable (CLKENBA)  
inputs. For the A-to-B data flow, the data flows through a single  
buffer. The B-to-A data can flow through a four-stage pipeline  
register path, or through a single register path, depending on the  
state of the select (SEL) input.  
• Typical V  
(Output Ground Bounce)  
OLP  
< 0.8V at V = 3.3V, T = 25°C  
CC  
A
• Typical V  
(Output V Undershoot)  
OH  
OHV  
< 2.0V at V = 3.3V, T = 25°C  
CC  
A
• Bus Hold retains last active bus state during 3-State  
eliminating the need for external pullup resistors  
• Industrial operation at –40°C to +85°C  
• Packages available:  
Data is stored in the internal registers on the low-to-high  
transition of the clock (CLK) input, provided that the appropriate  
CLKENBA input is low. The B-to-A data transfer is synchronized  
with CLK.  
– 56-pin 240 mil wide plastic TSSOP (A)  
– 56-pin 300 mil wide plastic SSOP (V)  
To reduce overshoot and undershoot, the A and B-port outputs  
include 26-ohm series resistors.  
Toensurethehigh-impedancestateduringpoweruporpowerdown,  
OE should be tied to Vcc through a pull-up resistor; the minimum  
value of the resistor is determined by the current-sinking capability  
of the driver.  
The PI74ALVCHR162524 has “Bus Hold” which retains the data  
input’s last state whenever the data input goes to high-impedance  
preventing “floating” inputs and eliminating the need for pullup/  
down resistors.  
Logic Block Diagram  
PS8314B  
11/06/00  
1
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