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PI74ALVCHT16835K PDF预览

PI74ALVCHT16835K

更新时间: 2024-10-27 15:47:55
品牌 Logo 应用领域
百利通 - PERICOM 驱动光电二极管逻辑集成电路电视
页数 文件大小 规格书
7页 129K
描述
Bus Driver, ALVC/VCX/A Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, 0.173 INCH, PLASTIC, TVSOP-56

PI74ALVCHT16835K 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SSOP包装说明:TSSOP,
针数:56Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.92系列:ALVC/VCX/A
JESD-30 代码:R-PDSO-G56长度:11.3 mm
逻辑集成电路类型:BUS DRIVER位数:18
功能数量:1端口数量:2
端子数量:56最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
传播延迟(tpd):5.6 ns认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.3 V标称供电电压 (Vsup):2.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.4 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

PI74ALVCHT16835K 数据手册

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PI74ALVCHT16835  
18-Bit Universal Bus Driver  
with 3-State Outputs  
Product Description  
Product Features  
Pericom Semiconductor’s PI74ALVCH series of logic circuits are  
produced using the Company’s advanced 0.5 micron CMOS  
technology, achieving industry leading speed.  
PI74ALVCHT16835 is designed for low-voltage operation  
V = 2.3V to 3.6V  
CC  
5V I/O Tolerant Inputs and Outputs  
The 18-bit PI74ALVCHT16835 universal bus driver is designed  
for 2.3V to 3.6V VCC operation.  
Typical V  
(Output Ground Bounce)  
OLP  
< 0.8V at V = 3.3V, T = 25°C  
CC  
A
Data flow from A to Y is controlled by Output Enable (OE). The  
device operates in the transparent mode when LE is HIGH. The A  
data is latched if CLK is held at a high or low logic level. If LE is  
LOW, the A-bus is stored in the latch/flip-flop on the low-to-high  
transition of CLK. When OE is HIGH, the outputs are in the high-  
impedance state.  
Typical V  
(Output V Undershoot)  
OH  
OHV  
< 2.0V at V = 3.3V, T = 25°C  
CC  
A
Bus Hold retains last active bus state during 3-State,  
eliminating the need for external pullup resistors  
Industrial operation at –40°C to +85°C  
Packages available:  
To ensure the high-impedance state during power up or power  
down, OE should be tied to VCC through a pullup resistor; the  
minimum value of the resistor is determined by the current-sinking  
capability of the driver.  
– 56-pin 240 mil wide plastic TSSOP (A)  
– 56-pin 300 mil wide plastic SSOP (V)  
– 56-pin 173 mil wide plastic TVSOP (K)  
Activebus-holdcircuitryisprovidedtoholdunusedorfloatingdata  
inputs at a valid logic level.  
Logic Block Diagram  
27  
OE  
30  
CLK  
28  
LE  
54  
A1  
1D  
C1  
CLK  
3
Y1  
TO 17 OTHER CHANNELS  
PS8547C  
12/12/01  
1

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