Datasheet > PI74ALVCHT16835VEX

PI74ALVCHT16835VEX

更新时间： 2024-10-28 10:47:15

品牌	Logo	应用领域
百利通 - PERICOM		光电二极管
页数	文件大小	规格书
7页	132K
描述
Bus Driver, ALVC/VCX/A Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, 0.300 INCH, PLASTIC, SSOP-56

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PI74ALVCHT16835

18-Bit Universal Bus Driver

with 3-State Outputs

Product Description

Product Features

Pericom Semiconductors PI74ALVCH series of logic circuits are

produced using the Companys advanced 0.5 micron CMOS

technology, achieving industry leading speed.

• PI74ALVCHT16835 is designed for low-voltage operation

• V = 2.3V to 3.6V

• 5V I/O Tolerant Inputs and Outputs

The 18-bit PI74ALVCHT16835 universal bus driver is designed

for 2.3V to 3.6V V_CCoperation.

• Typical V

(Output Ground Bounce)

OLP

< 0.8V at V = 3.3V, T = 25°C

Data flow from A to Y is controlled by Output Enable (OE). The

device operates in the transparent mode when LE is HIGH. The A

data is latched if CLK is held at a high or low logic level. If LE is

LOW, the A-bus is stored in the latch/flip-flop on the low-to-high

transition of CLK. When OE is HIGH, the outputs are in the high-

impedance state.

• Typical V

(Output V Undershoot)

OHV

< 2.0V at V = 3.3V, T = 25°C

• Bus Hold retains last active bus state during 3-State,

eliminating the need for external pullup resistors

• Industrial operation at 40°C to +85°C

• Packages available:

To ensure the high-impedance state during power up or power

down, OE should be tied to V_CCthrough a pullup resistor; the

minimum value of the resistor is determined by the current-sinking

capability of the driver.

56-pin 240 mil wide plastic TSSOP (A)

56-pin 300 mil wide plastic SSOP (V)

56-pin 173 mil wide plastic TVSOP (K)

Activebus-holdcircuitryisprovidedtoholdunusedorfloatingdata

inputs at a valid logic level.

Logic Block Diagram

CLK

TO 17 OTHER CHANNELS

PS8547C

12/12/01

12 3 4 5 6 7

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