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PI74ALVCHT16245 PDF预览

PI74ALVCHT16245

更新时间: 2024-10-26 23:27:39
品牌 Logo 应用领域
其他 - ETC 驱动器
页数 文件大小 规格书
4页 228K
描述
Logic | 16-Bit Buffer/Line Driver w/I/O Tol. & Bus Hold

PI74ALVCHT16245 数据手册

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PI74ALVCHT16245  
3.3V 16-Bit Bidirectional Transceiver  
with 3-State Output  
ProductDescription  
ProductFeatures  
Pericom Semiconductor’s PI74ALVCH series of logic circuits are  
producedintheCompany’sadvanced0.5micronCMOStechnology,  
achieving industry leading speed grades.  
PI74ALVCHT16245isdesignedforlowvoltageoperation  
V =2.3Vto3.6V  
CC  
5VI/OTolerant  
ThePI74ALVCHT16245isa16-bitbidirectionaltransceiverdesigned  
for asynchronous two-way communication between data buses.  
The direction control input pin (xDIR) determines the direction of  
data flow through the bidirectional transceiver. The Direction and  
OutputEnablecontrolsaredesignedtooperatethisdeviceaseither  
two independent 8-bit transceivers or one 16-bit transceiver. The  
output enable (OE) input, when HIGH, disables both A and B ports  
by placing them in HIGH Z condition.  
Hysteresis on all inputs  
Typical VOLP (Output Ground Bounce)  
<0.8VatV =3.3V,T =25°C  
CC  
A
TypicalVOHV (OutputVOH Undershoot)  
<2.0VatV =3.3V,T =25°C  
CC  
A
Bus Hold retains last active bus state during 3-state  
eliminating the need for external pull-up resistors  
To ensure the high-impedance state during power up or power  
down, OE should be tied to Vcc through a pull-up resistor; the  
minimum value of the resistor is determined by the current sinking  
ability of the driver.  
Industrial operation at -40°C to +85°C  
Packagesavailable:  
–48-pin240-milwideplasticTSSOP(A)  
–48-pin300-milwideplasticSSOP(V)  
The PI74ALVCHT16245 has “Bus Hold” which retains the data  
input’s last state whenever the data input goes to high-impedance  
preventing “floating” inputs and eliminating the need for pullup/  
down resistors.  
ThePI74ALVCHT16245canbedrivenfromeither3.3Vor 5.0Vdevices  
allowing this device to be used as a translator in a mixed 3.3/5.0V  
system.  
LogicBlockDiagram  
1DIR  
2DIR  
1OE  
2OE  
1A0  
1A1  
1A2  
1A3  
1A4  
1A5  
1A6  
1A7  
2A0  
2B0  
2A1  
2B1  
2A2  
2B2  
2A3  
2B3  
2A4  
2B4  
2A5  
2B5  
2A6  
2B6  
2A7  
2B7  
1B0  
1B1  
1B2  
1B3  
1B4  
1B5  
1B6  
1B7  
PS8308 07/30/98  
1

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