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PI74ALVCH32374NB PDF预览

PI74ALVCH32374NB

更新时间: 2024-10-26 23:27:39
品牌 Logo 应用领域
其他 - ETC 触发器逻辑集成电路驱动
页数 文件大小 规格书
7页 467K
描述
FLIP-FLOP|32-BIT|D TYPE|AVC/ALVC-CMOS|BGA|96PIN|PLASTIC

PI74ALVCH32374NB 数据手册

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PI74ALVCH32374  
32-Bit Edge Triggered D-Type Flip-Flop  
with 3-State Outputs  
Product Features  
ProductDescription  
Pericom Semiconductor’s PI74ALVCH series of logic circuits are  
produced using the Company’s advanced 0.5 micron CMOS  
technology, achieving industry leading speed.  
PI74ALVCH32374 is designed for low voltage operation  
V = 2.3V to 3.6V  
CC  
Typical V  
(Output Ground Bounce)  
OLP  
This 32-bit edge-triggered D-type flip-flop is designed for 2.3V to  
< 0.8V at V = 3.3V, T = 25°C  
CC  
A
3.6V V operation.  
CC  
Typical V  
(Output V Undershoot)  
OH  
OHV  
The PI74ALVCH32374 is particularly suitable for implementing  
buffer registers, I/O ports, bidirectional bus drivers, and working  
registers. This device can be used as four 8-bit flip-flops or two  
16-bitflip-flopsorone32-Bitflip-flop.Onthepositivetransitionof  
theClock(CLK)input,theQoutputsoftheflip-floptakeonthelogic  
levelssetupatthedata(D)inputs. OEcanbeusedtoplacetheeight  
outputs in either a normal logic state (high or low logic levels) or a  
high-impedance state. In that state, the outputs neither load nor  
drive the bus lines significantly. The high-impedance state and the  
increased drive provide the capability to drive bus lines without  
needforinterfaceorpullupcomponents.OEdoesnotaffectinternal  
operationsoftheflip-flop. Olddatacanberetainedornewdatacan  
be entered while the outputs are in the high-impedance state.  
> 2.0V atV = 3.3V, T = 25°C  
CC  
A
Bus Hold retains last active bus state during 3-State  
eliminating the need for external pullup resistors  
Industrial operation at –40°C to +85°C  
Packages available:  
– 96-ball, 13.5mm x 5.5mm x 1.4mm low profile fine  
pitch ball grid array, LFBGA(NB)  
To ensure the high-impedance state during power up or power  
down, OE should be tied to V through a pullup resistor; the  
CC  
minimumvalue of the resistor is determined by the current-sinking  
capability of the driver.  
Active bus-hold circuitry is provided to hold unused or floating  
data inputs at a valid logic level.  
LogicBlockDiagram  
H3  
A3  
2OE  
1OE  
H4  
E5  
A4  
2CLK  
2D1  
1CLK  
C1  
C1  
E2  
A2  
2Q1  
1Q1  
A5  
1D  
1D1  
1D  
To Seven Other Channels  
To Seven Other Channels  
T3  
T4  
J3  
J4  
4OE  
3OE  
4CLK  
3CLK  
C1  
1D  
C1  
1D  
N2  
J2  
4Q1  
3Q1  
N5  
J5  
4D1  
3D1  
To Seven Other Channels  
To Seven Other Channels  
PS8439  
10/14/99  
1

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