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PI74ALVCHR162524 PDF预览

PI74ALVCHR162524

更新时间: 2024-10-26 23:27:39
品牌 Logo 应用领域
其他 - ETC /
页数 文件大小 规格书
7页 416K
描述
Logic | 18-Bit Registered Bus Exchanger w/Dual Resistor

PI74ALVCHR162524 数据手册

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PI74ALVCHR162524  
18-Bit Registered Bus Transceiver  
with 3-State Outputs  
ProductDescription  
Product Features  
Pericom Semiconductor’s PI74ALVCH series of logic circuits are  
produced using the Company’s advanced 0.5 micron CMOS  
technology, achieving industry leading speed.  
PI74ALVCHR162524 is designed for low voltage operation  
V = 2.3V to 3.6V  
CC  
A & B parts have equivalent 26 Ohm series resistors  
ThePI74ALVCHR162524data flowineachdirectioniscontrolledby  
output-enable (OEAB and OEBA) and clock-enable (CLKENBA)  
inputs. For the A-to-B data flow, the data flows through a single  
buffer. The B-to-A data can flow through a four-stage pipeline  
register path, or through a single register path, depending on the  
state of the select (SEL) input.  
Typical V  
(Output Ground Bounce)  
OLP  
< 0.8V at V = 3.3V, T = 25°C  
CC  
A
Typical V  
(Output V Undershoot)  
OH  
OHV  
< 2.0V at V = 3.3V, T = 25°C  
CC  
A
Bus Hold retains last active bus state during 3-State  
eliminating the need for external pullup resistors  
Industrial operation at –40°C to +85°C  
Packages available:  
Data is stored in the internal registers on the low-to-high  
transition of the clock (CLK) input, provided that the appropriate  
CLKENBA input is low. The B-to-A data transfer is synchronized  
with CLK.  
– 56-pin 240 mil wide plastic TSSOP (A)  
– 56-pin 300 mil wide plastic SSOP (V)  
To reduce overshoot and undershoot, the A and B-port outputs  
include 26-ohm series resistors.  
Toensurethehigh-impedancestateduringpoweruporpowerdown,  
OE should be tied to Vcc through a pull-up resistor; the minimum  
value of the resistor is determined by the current-sinking capability  
of the driver.  
The PI74ALVCHR162524 has “Bus Hold” which retains the data  
input’s last state whenever the data input goes to high-impedance  
preventing “floating” inputs and eliminating the need for pullup/  
down resistors.  
Logic Block Diagram  
PS8314B  
11/06/00  
1

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