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PI6C2504QEX PDF预览

PI6C2504QEX

更新时间: 2024-11-29 20:01:31
品牌 Logo 应用领域
百利通 - PERICOM 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
4页 345K
描述
PLL Based Clock Driver, 6C Series, 4 True Output(s), 0 Inverted Output(s), PDSO16, 0.150 INCH, 0.635 MM PITCH, PLASTIC, QSOP-16

PI6C2504QEX 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SSOP, SSOP16,.25针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.82
系列:6C输入调节:STANDARD
JESD-30 代码:R-PDSO-G16JESD-609代码:e3
长度:4.9 mm逻辑集成电路类型:PLL BASED CLOCK DRIVER
湿度敏感等级:1功能数量:1
反相输出次数:端子数量:16
实输出次数:4最高工作温度:70 °C
最低工作温度:输出特性:SERIES-RESISTOR
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:3.3 V认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.2 ns座面最大高度:1.75 mm
子类别:Clock Drivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:3.9116 mm
最小 fmax:80 MHzBase Number Matches:1

PI6C2504QEX 数据手册

 浏览型号PI6C2504QEX的Datasheet PDF文件第2页浏览型号PI6C2504QEX的Datasheet PDF文件第3页浏览型号PI6C2504QEX的Datasheet PDF文件第4页 
PI6C2504  
Phase-Locked Loop Clock Driver  
with 4 Clock Outputs  
ProductFeatures  
ProductDescription  
High-PerformancePhase-Locked-LoopClock  
The PI6C2504 features a low-skew, low-jitter, phase-locked loop  
(PLL) clock driver, distributing high-frequency clock signals for  
SDRAM and server applications. By connecting the feedback  
FB_OUT output to the feedback FB_IN input, the propagation  
delayfromtheCLK_INinputtoanyclockoutputwillbenearlyzero.  
DistributionforNetworking  
Registered DIMM Synchronous DRAM modules  
for server/workstation/PC applications  
Allows Clock Input to have Spread Spectrum  
modulation for EMI reduction  
Zero Input-to-Output delay  
Low jitter: Cycle-to-Cycle jitter ±100ps max.  
On-chip series damping resistor at clock output  
drivers for low noise and EMI reduction  
Operatesat3.3VVCC  
Wide range of Clock Frequencies up to 80 MHz  
Package:Plastic16-pinQSOPPackage(Q)  
LogicBlockDiagram  
ProductPinConfiguration  
G
CLK_IN  
AGND  
1
2
3
4
5
6
7
16  
15  
14  
13  
12  
11  
10  
4
CLK_IN  
FB_IN  
Y[0:3]  
V
CC  
Y0  
Y1  
AV  
CC  
PLL  
GND  
GND  
Y3  
16-Pin  
Q
FB_OUT  
AV  
CC  
GND  
V
Y2  
CC  
FunctionalTable  
G
V
CC  
Inputs  
Outputs  
FB_IN  
FB_OUT  
8
9
G
L
Y[0:3]  
L
FB_OUT  
CLK_IN  
CLK_IN  
H
CLK_IN  
08-0298  
PS8380A  
11/13/08  
1

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